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PDF PXB4220 Data sheet ( Hoja de datos )

Número de pieza PXB4220
Descripción IWE8 Interworking Element for 8 E1/T1 Lines
Fabricantes Infineon Technologies AG 
Logotipo Infineon Technologies AG Logotipo



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No Preview Available ! PXB4220 Hoja de datos, Descripción, Manual

The "Interworking Element for 8 E1/T1 lines"
(IWE8), PXB 4220 and PXB 4221 are members of
Infineon" ATM Chipset. Together with framing and
line interface components (e.g. Infineon's
QuadFALC PEB 22554) the IWE8 serves as gate-
way between Asynchronous Transfer Mode (ATM)
networks and timeslot based PDH networks.
The IWE8 is a single chip multiservice device that
integrates ATM cell handling and TDM circuit to
ATM cell interworking in E1/T1 applications. Each
of the 8 E1 or T1 input and output ports can be
configured independently to operate in ATM Mode
or AAL Mode. It is a very flexible solution support-
ing multiple services with a minimum of devices.
PRODUCT BRIEF
Features
s Full duplex ATM Packetizer/
Depacketizer for 8 E1/T1
highways
s Configurable to T1 or E1 mode
via external pin
s 8 T1/E1 ports configurable inde-
pendently to ATM or AAL Mode
s ATM Mode:
- ATM cell mapping into PDH
according to ITU-T G.804
- B-ISDN User-Network
Interface
- Physical Layer Opera-
tion at 1544 kbit/s and
2048 kbit/s according to
ITU-T I.432.3
s AAL Mode (PXB 4220/4221):
- AAL1 according to
ITU-T I.363.1 or transparent
without any adaptation layer
overhead (AAL0)
- Structured T1/E1 N x 64 kbit/s
service
- Channel Associated Signalling
(CAS)
- Partially filled cells with pro-
grammable filling thresholds
- Reassembly buffer can com-
pensate up to +/- 4 ms Cell
Delay Variation (CDV)
- Statistics counters per chan-
nel for lost/misinserted/errored
cells etc.
- Internal clock recovery circuit
using Synchronous Residual
Time Stamp (SRTS) or Adap-
tive Clock Method (ACM) for
unstructured CES ports.
Optionally, it's possible to
order the PXB 4221 device,
which comes without SRTS
clock recovery.
I W E 8s Inverse Multiplexing over ATM
(IMA) interface
s 8 generic framer interfaces with
integrated transmit clock selec-
tor supporting
- Synchronous Mode (SYM)
- Generic Interface Mode (GIM)
- FALC Mode (FAM): Glue-less
interface for Infineon's Framer
and Line Interface Compo-
nents (FALC)
- Echo Canceller Mode (EC):
ATM cells are duplicated
internally and transmitted via
two framer ports
s UTOPIA industry standard
interface:
- Level 2 in slave mode; 8 data,
5 address lines
- Level 1 in master/slave mode
- UTOPIA clock up to 38.88 MHz
IWE8
PXB 4220/4221
Never stop thinking.

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