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부품번호 | PCA9517 기능 |
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기능 | Level translating I2C-bus repeater | ||
제조업체 | NXP Semiconductors | ||
로고 | |||
전체 19 페이지수
PCA9517
Level translating I2C-bus repeater
Rev. 03 — 30 January 2007
Product data sheet
1. General description
The PCA9517 is a CMOS integrated circuit that provides level shifting between low
voltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.
While retaining all the operating modes and features of the I2C-bus system during the
level shifts, it also permits extension of the I2C-bus by providing bidirectional buffering for
both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Using
the PCA9517 enables the system designer to isolate two halves of a bus for both voltage
and capacitance. The SDA and SCL pins are over voltage tolerant and are
high-impedance when the PCA9517 is unpowered.
The 2.7 V to 5.5 V bus B-side drivers behave much like the drivers on the PCA9515A
device, while the adjustable voltage bus A-side drivers drive more current and eliminate
the static offset voltage. This results in a LOW on the B-side translating into a nearly 0 V
LOW on the A-side which accommodates smaller voltage swings of lower voltage logic.
The static offset design of the B-side PCA9517 I/O drivers prevent them from being
connected to another device that has rise time accelerator including the PCA9510,
PCA9511, PCA9512, PCA9513, PCA9514, PCA9515A, PCA9516A, PCA9517 (B-side),
or PCA9518. The A-side of two or more PCA9517s can be connected together, however,
to allow a star topography with the A-side on the common bus, and the A-side can be
connected directly to any other buffer with static or dynamic offset voltage. Multiple
PCA9517s can be connected in series, A-side to B-side, with no build-up in offset voltage
with only time of flight delays to consider.
The PCA9517 drivers are not enabled unless VCCA is above 0.8 V and VCC is above 2.5 V.
The EN pin can also be used to turn the drivers on and off under system control. Caution
should be observed to only change the state of the enable pin when the bus is idle.
The output pull-down on the B-side internal buffer LOW is set for approximately 0.5 V,
while the input threshold of the internal buffer is set about 70 mV lower (0.43 V). When the
B-side I/O is driven LOW internally, the LOW is not recognized as a LOW by the input.
This prevents a lock-up condition from occurring. The output pull-down on the A-side
drives a hard LOW and the input level is set at 0.3VCCA to accommodate the need for a
lower LOW level in systems where the low voltage side supply voltage is as low as 0.9 V.
2. Features
I 2 channel, bidirectional buffer isolates capacitance and allows 400 pF on either side of
the device
I Voltage level translation from 0.9 V to 5.5 V and from 2.7 V to 5.5 V
I Footprint and functional replacement for PCA9515/15A
I I2C-bus and SMBus compatible
NXP Semiconductors
PCA9517
Level translating I2C-bus repeater
be able to rise to 0.5 V until the A-side rises above 0.3VCCA, then the B-side will continue
to rise being pulled up by the external pull-up resistor. The VCCA is only used to provide
the 0.3VCCA reference to the A-side input comparators and for the power good detect
circuit. The PCA9517 logic and all I/Os are powered by the VCCB pin.
6.1 Enable
The EN pin is active HIGH with an internal pull-up to VCCB and allows the user to select
when the repeater is active. This can be used to isolate a badly behaved slave on
power-up until after the system power-up reset. It should never change state during an
I2C-bus operation because disabling during a bus operation will hang the bus and
enabling part way through a bus cycle could confuse the I2C-bus parts being enabled.
The enable pin should only change state when the global bus and the repeater port are in
an idle state to prevent system failures.
6.2 I2C-bus systems
As with the standard I2C-bus system, pull-up resistors are required to provide the logic
HIGH levels on the buffered bus (standard open-collector configuration of the I2C-bus).
The size of these pull-up resistors depends on the system, but each side of the repeater
must have a pull-up resistor. This part designed to work with Standard mode and Fast
mode I2C-bus devices in addition to SMBus devices. Standard mode I2C-bus devices only
specify 3 mA output drive; this limits the termination current to 3 mA in a generic I2C-bus
system where Standard mode devices and multiple masters are possible. Under certain
conditions higher termination currents can be used.
Please see Application Note AN255, I2C/SMBus Repeaters, Hubs and Expanders for
additional information on sizing resistors and precautions when using more than one
PCA9517 in a system or using the PCA9517 in conjunction with other bus buffers.
PCA9517_3
Product data sheet
Rev. 03 — 30 January 2007
© NXP B.V. 2007. All rights reserved.
4 of 19
4페이지 NXP Semiconductors
PCA9517
Level translating I2C-bus repeater
CARD 2
CARD 1
VCCA
VCCB
RPU
RPU
VCCA
10 kΩ
VCCB
10 kΩ
10 kΩ
(optional)
75 Ω
SDAA
SDAB
SCLA
SCLB
75 Ω
EN
GND
MASTER
OR
SLAVE
Fig 7. Typical application of PCA9517 driving a short cable
002aac637
SCL
SDA
9th clock pulse
acknowledge
Fig 8. Bus A (0.9 V to 5.5 V bus) waveform
002aac775
SCL
SDA
9th clock pulse
acknowledge
VOL of slave
Fig 9. Bus B (2.7 V to 5.5 V) waveform
VOL of PCA9517
002aac205
PCA9517_3
Product data sheet
Rev. 03 — 30 January 2007
© NXP B.V. 2007. All rights reserved.
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다운로드 | [ PCA9517.PDF 데이터시트 ] |
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구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
PCA9510 | Hot swappable I2C and SMBus bus buffer | NXP Semiconductors |
PCA9510A | Hot swappable I2C-bus and SMBus bus buffer | NXP Semiconductors |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |