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PDF BU2505FV Data sheet ( Hoja de datos )
| Número de pieza | BU2505FV | |
| Descripción | 10bit 10-channel D/A converter | |
| Fabricantes | ROHM Semiconductor | |
| Logotipo |  |
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Datasheet
D/A Converter Series for Electronic Adjustment
10bit 8ch/10ch D/A Converters
BU2505FV BU2506FV
General Description
The BU2505FV and BU2506FV ICs are 10bit R-2R type
D/A converters with 10ch and 8ch outputs, respectively.
Cascade connection is available, ensuring suitability for
multi-channel applications. Each channel incorporates a
full swing output type buffer amplifier with high speed
output response characteristics, resulting in a greatly
shortened D/A output settling time. The ICs also have
digital input pins compatible with TTL levels, and the
maximum value of the data transfer frequency is 10MHz.
With the variable output range function, the upper and
lower limits of the output voltage can be set separately
from the power supply voltage.
Features
■ Built-in Multi-channel R-2R Type 10bit D/A Converter
(BU2506FV: 8 Channels, BU2505FV: 10 Channels)
■ Built-in Full Swing Output Buffer Amplifier for All
Channels
■ RESET Terminal to fix the Output Voltage to the Lower
Reference Level for All Channels
■ Digital Inputs Compatible with TTL Levels
■ 3-wire Serial Interface and RESET Signal to send a
14bit Format Word (4bit Address and 10bit Data)
■ REVERSE Terminal to select LSB First or MSB First of
10bit Data
■ Cascade Connection is Available
Applications
■ Control of the Various Types of Consumer and
Industrial Equipment
Typical Application Circuit
Key Specifications
■ Operating Supply Voltage Range：
■ Number of Channels：
BU2505FV：
BU2506FV：
■ Differential Non Linearity Error：
■ Integral Non Linearity Error：
■ Data Transfer Frequency：
4.5V to 5.5V
10ch
8ch
±1.0LSB(Max)
±3.5LSB(Max)
10MHz(Max)
Packages
SSOP-B20
W(Typ) x D(Typ) x H(Max)
6.50mm x 6.40mm x 1.45mm
SSOP-B20
CCoonntrtorollellrer
VVDreDfH
(VrefH)
VVCCCC
VVSrSefL
(VrefL)
RREeVvEeRrSsEe
RREeSsEeTt
AAOO11
AAOO22
AAOO33
LLDD
CCLLKK
DDII
GGNNDD
AAOO1100
CCHH11
CCHH22
CCHH33
CCHH1100
○Product structure：Silicon monolithic integrated circuit
www.rohm.com
p© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
○This product has no designed protection against radioactive rays.
1/18
TSZ02201-0RLR0GZ10140-1-2
11.Dec.2015 Rev.001
1 page  
BU2505FV BU2506FV
Timing Characteristics(Unless otherwise specified, VCC=5V, VrefH=5V, VrefL=0V, TA=25°C)
Parameter
Symbol
Limits
Min Typ Max
Conditions
Unit The voltage levels of the measured time
points are 20% or 80% of VCC.
Reset L pulse width
tRTL 50 -
-
-
Clock L pulse width
tCKL 50 -
-
-
Clock H pulse width
tCKH
50
-
-
-
Clock rise time
tcr - - 50
-
Clock fall time
tcf - - 50
-
Data setup time
tDCH
20
-
- ns
-
Data hold time
tCHD
40
-
-
-
Load setup time
tCHL 50 -
-
-
Load hold time
tLDC 50 -
-
-
Load H pulse width
tLDH 50 -
-
-
Data output delay time
tDO - - 90
CL=100pF
CL≤100pF(Note 6), VO: 0.5V↔4.5V
The time interval from the start time to
D/A output settling time
tLDD - 7 20 μs change an output voltage to the time at
which the output voltage reaches to its
final value within 1/2 LSB.
(Note 6) A capacitor should be placed between the analog output and ground in order to eliminate noise.
A capacitance up to 100pF is recommended (including the capacitance of the wire).
RESET
CLK
DI
LD
DA
OUTPUT
DO
OUTPUT
tRTL
tcr
tCKL
tCKH
tcf
tDCH tCHD
tCHL
tDO
tLDH
tLDC
tLDD
Applicational information
LD input
The LD input is a level trigger signal. When LD=H, an internal shift register value is loaded into a latch. It doesn’t
have to be cared whether CLK is H or L when LD changes to H. However CLK must not be changed while LD is H.
The shift register values pass through the latches if LD=H and CLK is toggled.
Power-on operation
The BU2505FV and the BU2506FV does not have a power-on reset function. Therefore, after power-on, data in
the internal registers are unknown. When RESET changes from H to L, all latch outputs turn into L, although the
shift registers are not reset.
Pull-down resister
Pin 5 and pin 6 are pulled up internally. If putting the external pull-down resister on them, the recommended value
is less than 1kΩ.
Truth Table
Pin 5: RESET
Pin 6: REVERSE
L
Reset
MSB first
H
Normal
LSB first
www.rohm.co.jp
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
5/18
TSZ02201-0RLR0GZ10140-1-2
11.Dec.2015 Rev.001
5 Page 
BU2505FV BU2506FV
Typical Performance Curves(reference data) - continued
1.5
1
0.5
0
-0.5
-1
-1.5
0
200 400 600 800
Input Code [decimal]
1000 1200
Figure 7. INL vs Input Code
(Integral linearity error, TA=-30°C)
1.5
1
0.5
0
-0.5
-1
-1.5
0
200 400 600 800 1000 1200
Input Code [decimal]
Figure 8. INL vs Input Code
(Integral linearity error, TA=+25°C)
1.5
1
0.5
0
-0.5
-1
-1.5
0
200 400 600 800
Input Code [decimal]
1000 1200
Figure 9. INL vs Input Code
(Integral linearity error, TA=+85°C)
www.rohm.co.jp
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
11/18
TSZ02201-0RLR0GZ10140-1-2
11.Dec.2015 Rev.001
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet BU2505FV.PDF ] | |
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