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PDF BU38803 Data sheet ( Hoja de datos )
| Número de pieza | BU38803 | |
| Descripción | System control servo | |
| Fabricantes | ROHM Semiconductor | |
| Logotipo |  |
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Video ICs
System control servo
BU38603 / BU38703 / BU38803
The BU38603, BU38703 and BU38803 are servo controller ICs for VCRs. They contain a high-speed, 8-bit CPU and
perform the processing required for the drum, capstan, FV and PV completely in software, allowing a large reduction
in the number of external components required. They also contain high-performance linear amplifiers, eliminating the
need for interface ICs. Specialized hardware is included for items that require high-speed processing, to allow
efficient utilization of the CPU.
•Applications
VHS VCRs and camcorders
•Features
1) CPU
499 commands (69 types)
Memory-mapped I / O
Minimum command execution time: 250ns (8MHz)
2)ROM capacity
BU38603: 16384 × 8 bit
BU38703: 24576 × 8 bit
BU38803: 32768 × 8 bit
3) RAM capacity: 512 × 8bit
4) Interrupt
Pattern generator: 1
Watch-dog timer: 1
External interrupts: 1
FG interrupts: 5
Internal interrupts: 7
Two timers, serial transmission, interrupt, VHSW,
CTL interval timer (fixed) / VISS
∗ Multi-layer interrupts possible.
5) Free-running counter: 19 bit
6) PWM output: 12 bit × 2
7) Pattern generator
17 bits from FRC MSB used.
Output
Internal: 3 bit
External (PO): 5 bit
External (PIO): 6 bit
8) Programmable pre-scaler
CFG: 7 bit
CTL: 6 bit
9) Head amplifier / chroma rotary
Generated from pattern generator output.
10) Built-in AGC. Five-bits used to switch the gain
control registers for the CTL amplifier.
11) CTL counter: 1 / 30 or 1 / 25
12) Data shift PLL calculation: 24 bit
13) Timer: 8 bit × 2
14) Synchronous serial input/output: 8 bit × 1
15) VH PULSE
V separeted from composite synchronous snal.
Pseudo V generated from pattern generator
output.
Superimposed pseudo H synchronized with
the composite synchronous signal.
16) VISS / VASS
VASS 0 / 1 discrimination
VISS discrimination threshold: 3
Aspect discrimination.
D / A CTL switching.
17) Standard I / O
Parallel I / O (PIO): 32 bit
Parallel output (PO): 6 bit
18) A / D converter: 8 bits × 8 channels
Can be masked-programmed to be parallel inputs.
19) Watch-dog timer
Setting period: 4
20) Linear circuits
DFG: amplifier / comparator
CFG: amplifier / comparator
CTL: differential amplifier / comparator
DPG: comparator
1
1 page  
Video ICs
•Measurement circuits
BU38603 / BU38703 / BU38803
1k 10 22 43
11
12
1k
14
A IclkI
A
V1
B
C SW1
15
63
xtal
A
B
Iclko C
A
SW2
62
V2 A
Itest
A
V3 B SW3
24
1
10 64
TEST pin
I1in
A
A
B
SW4
C
V4
V V1out I4
Fig.1
1k
11
12
1k
14
15
SW1
A
18
B
Idad Idda Idd
AAA
10 22 43
A
63
SW2 B
SW3 A
62 B
xtal
2-9, 24, 27-36, 46-58
SW4
65-75, 77, 78
SW5
1 10 64
Fig.2
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet BU38803.PDF ] | |
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