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PDF BU4051BCFV Data sheet ( Hoja de datos )

Número de pieza BU4051BCFV
Descripción 8-channel analog multiplexer / demultiplexer
Fabricantes ROHM Semiconductor 
Logotipo ROHM Semiconductor Logotipo



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Datasheet
General Purpose CMOS Logic IC
8ch Analog Multiplexer/Demultiplexer
BU4051BC BU4051BCF BU4051BCFV
General Description
The BU4051BC, BU4051BCF, BU4051BCFV are
multiplexers/demultiplexers with capabilities of selection
and mixture of analog signal and digital signal.
This series are configured with 8channels
input/output.The digital signal of the control terminal
turns on the corresponding switch of each channel. The
large amplitude voltage (VDD-VEE) can be switched by
the control signal with small logical amplitude voltage
(VDD-VSS).
Key Specifications
Operating Supply Voltage Range:
3V to 18V
Input Voltage Range(Control):
VSS to VDD
Input/Output Voltage Range(switch):
VEE to VDD
Operating Temperature Range:
-40°C to +85°C
Packages
DIP16
SOP16
SSOP-B16
W(Typ) x D(Typ) x H(Max)
19.40mm x 6.50mm x 7.95mm
10.00mm x 6.20mm x 1.71mm
5.00mm x 6.40mm x 1.35mm
Features
Low Power Consumption
Wide Operating Supply Voltage
High Input Impedance
DIP16
SOP16
Truth Table
INHIBIT
L
L
L
L
L
L
L
L
H
CONTROL
A
L
H
L
H
L
H
L
H
Dont Care
B
L
L
H
H
L
L
H
H
Dont Care
SSOP-B16
C
L
L
L
L
H
H
H
H
Dont Care
ON SWITCH
X0
X1
X2
X3
X4
X5
X6
X7
NONE
Product structure : Silicon monolithic integrated circuit
.www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111 14 001
This product has no designed protection against radioactive rays
1/17
TSZ02201-0RDR0GZ00280-1-2
06.Jan.2015 Rev.001

1 page




BU4051BCFV pdf
BU4051BC BU4051BCF BU4051BCFV
Waveforms of Switching Characteristics
VDD
X1 to X7
(INPUT)
VEE
50%
X
(OUTPUT)
50%
tPLH
tPHL
Figure 1. Propagation Delay Time IN→OUT(tPLH,tPHL)
Wave form
VDD
CONTROL
(INPUT)
VSS
X
(OUTPUT)
50%
50%
90%
tPZH
tPHZ
Figure 3. Propagation Delay Time
CONTROL (A,B,C,INHIBIT)→OUT (tPLH,tPHL)
Wave form
VDD
CONTROL
(INPUT)
VSS
50%
X
(OUTPUT)
50%
10%
tPZL
tPLZ
Figure 5. Propagation Delay Time
CONTROL (A,B,C,INHIBIT)→OUT (tPZL,tPLZ)
CONTROL
IN
VDD
A
B
CX
INHIBIT
X1 to X7
VEE, VSS
RL
OUT
CL
Figure 2. Propagation Delay Time IN→OUT(tPLH,tPHL)
Test Circuit
CONTROL
VDD
VDD
A
B
CX
INHIBIT
X1 to X7
VEE, VSS
RL
OUT
CL
Figure 4. Propagation Delay Time
CONTROL (A,B,C,INHIBIT)→OUT (tPLH,tPHL)
Test Circuit
CONTROL
VDD
A
B
RL
CX
INHIBIT
X1 to X7
VEE, VSS
CL
OUT
Figure 6. Propagation Delay Time
CONTROL (A,B,C,INHIBIT)→OUT (tPZL,tPLZ)
Test Circuit
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111 15 001
5/17
TSZ02201-0RDR0GZ00280-1-2
06.Jan.2015 Rev.001

5 Page





BU4051BCFV arduino
BU4051BC BU4051BCF BU4051BCFV
Operational Notes
1. Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the ICs power
supply pins.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3. VDD Voltage
Ensure that no pins are at a voltage above that of the VDD pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum
rating, increase the board size and copper area to prevent exceeding the Pd rating.
6. Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
7. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8. Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111 15 001
11/17
TSZ02201-0RDR0GZ00280-1-2
06.Jan.2015 Rev.001

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