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BU4093B 데이터시트 PDF




ROHM Semiconductor에서 제조한 전자 부품 BU4093B은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 BU4093B 기능
기능 Quad 2-input NAND Schmitt trigger
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BU4093B 데이터시트, 핀배열, 회로
Datasheet
General Purpose CMOS Logic IC
Quad 2-Input
NAND Schmitt Trigger
BU4093B BU4093BF BU4093BFV
General Description
BU4093B, BU4093BF, BU4093BFV consist of four
independent 2-input NAND gates with Schmitt-trigger
function on all inputs. An inverter-based buffer is
incorporated at the gate output to improve I/O
transmission characteristics, and it minimizes a variation
in the propagation time caused by an increase in the load
capacitance.
Features
Low Power Consumption
High Noise Immunity
Wide Operating Supply Voltage Range
High Input Impedance
High Fan Out
2 L-TTL Inputs or 1 LS-TTL Input can be directly
driven
All Outputs are buffered
Key Specifications
Operating Supply Voltage Range:
Input Voltage Range:
Operating Temperature Range:
+3V to +16V
0V to VDD
-40°C to +85°C
Packages
DIP14
SOP14
SSOP-B14
W(Typ) x D(Typ) x H(Max)
19.40mm x 6.50mm x 7.95mm
8.70mm x 6.20mm x 1.71mm
5.00mm x 6.40mm x 1.35mm
Pin Configurations
(Top View)
VDD A4 B4 O4 O3 B3 A3
14 13 12 11 10 9 8
DIP14
BU4093B
SOP14
BU4093BF
12345
A1 B1 O1 O2 B2
Truth Table
INPUT
AB
LL
LH
HL
HH
67
A2 VSS
OUTPUT
O
H
H
H
L
SSOP-B14
BU4093BFV
Product structure: Silicon monolithic integrated circuit This product has no designed protection against radioactive rays
www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
TSZ2211114001
1/14
TSZ02201-0RDR1GZ00070-1-2
21.Aug.2013 Rev.001




BU4093B pdf, 반도체, 판매, 대치품
BU4093B BU4093BF BU4093BFV
Test Circuits (one NAND Schmitt trigger circuit only)
1.VIH
VDD
2.VIL
+
VIH
V VOL
VIL
VDD
Datasheet
+
V VOH
3.VOH
VDD
VIL
4.VOL
+
IOH V VOH
VIH
VDD
+
IOL V VOL
5.IOH
VDD
6.IOL
VDD
VIL
A
+
IOH
VIH
A
+
IOL
VOH
VOL
7. tTLH, tTHL, tPLH, tPHL
VDD
INPUT
www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
20ns
20ns
OUTPUT
CL=50pF
INPUT
10%
90%
50%
tPHL
tPLH
OUTPUT
90%
50%
10%
tTHL
tTLH
Description of Symbols
tPHL : Time from 50% of the rise edge of input waveform to 50% of
the fall edge of output waveform
tPLH : Time from 50% of the fall edge of input waveform to 50% of
the rise edge of output waveform
tTHL : Time from 90% to 10% of fall edge of output waveform
tTLH : Time from 10% to 90% of rise edge of output waveform
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TSZ02201-0RDR1GZ00070-1-2
21.Aug.2013 Rev.001

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BU4093B 전자부품, 판매, 대치품
BU4093B BU4093BF BU4093BFV
Typical Performance Curves - continued
Datasheet
400
350
Operating Temperature Range
300
250
200
150
VDD=3V
100
VDD=5V
50 VDD=10V
VDD=18V
0
-50 -25 0 25 50 75 100
Ambient Temperature [°C]
Figure 9. “H” to ”L” Propagation delay time tPHL
Power Dissipation
Power dissipation(total loss) indicates the power that can be consumed by IC at Ta=25°C(normal temperature). IC is heated
when it consumed power, and the temperature of IC chip becomes higher than ambient temperature. The temperature that
can be accepted by IC chip depends on circuit configuration, manufacturing process, and consumable power is limited.
Power dissipation is determined by the temperature allowed in IC chip(maximum junction temperature) and thermal
resistance of package(heat dissipation capability). The maximum junction temperature is typically equal to the maximum
value in the storage temperature range. Heat generated by consumed power of IC radiates from the mold resin or lead
frame of the package. The parameter which indicates this heat dissipation capability(hardness of heat release)is called
thermal resistance, represented by the symbol θja (°C/W).The temperature of IC inside the package can be estimated by
this thermal resistance. Figure 10 shows the model of thermal resistance of the package. Thermal resistance θja, ambient
temperature Ta, maximum junction temperature Tjmax, and power dissipation Pd can be calculated by the equation below:
θja = (Tjmax-Ta) / Pd (°C/W)
Derating curve in Figure 11 indicates power that can be consumed by IC with reference to ambient temperature. Power that
can be consumed by IC with reference to ambient temperature. Power that can be consumed by IC begins to attenuate at
certain ambient temperature. This gradient is determined by thermal resistance θja. Thermal resistance θja depends on
chip size, power consumption, package, ambient temperature, package condition, wind velocity, etc even when the same of
package is used. Thermal reduction curve indicates a reference value measured at a specified condition.
1.4
1.2
θja=(Tjmax-Ta)/Pd (°C/W)
AmbienttemperTaatu[re] Ta ()
1.0
BU4093B (DIP14)
0.8
BU4093BFV(SSOP-B14)
0.6
0.4
BU4093BF (SOP14)
0.2
Chip surfacetemperaTtuj r[e ]Tj ()
Power dissipation Pd (W)
消費電力 P [W]
Figure 10. Thermal resistance
www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
0.0
0
7/14
85
25 50 75 100 125
Ambient Temperature []
Figure 11. Derating Curve
150
TSZ02201-0RDR1GZ00070-1-2
21.Aug.2013 Rev.001

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관련 데이터시트

부품번호상세설명 및 기능제조사
BU4093B

Quad 2-input NAND Schmitt trigger

ROHM Semiconductor
ROHM Semiconductor
BU4093BF

Quad 2-input NAND Schmitt trigger

ROHM Semiconductor
ROHM Semiconductor

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