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PDF BUJ105AX Data sheet ( Hoja de datos )
| Número de pieza | BUJ105AX | |
| Descripción | Silicon Diffused Power Transistor | |
| Fabricantes | NXP Semiconductors | |
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Philips Semiconductors
Silicon Diffused Power Transistor
Product specification
BUJ105AX
GENERAL DESCRIPTION
High-voltage, high-speed planar-passivated npn power switching transistor in a plastic full-pack envelope intended
for use in high frequency electronic lighting ballast applications, converters, inverters, switching regulators, motor
control systems, etc.
QUICK REFERENCE DATA
SYMBOL
VCESM
VCBO
VCEO
IC
ICM
Ptot
VCEsat
hFEsat
tf
PARAMETER
Collector-emitter voltage peak value
Collector-Base voltage (open emitter)
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
Fall time
CONDITIONS
VBE = 0 V
Ths ≤ 25 ˚C
IC = 4.0 A;IB = 0.8 A
IC = 4.0 A; VCE = 5 V
IC = 5 A; IB1 = 1.0A
TYP.
-
-
-
-
-
-
0.3
11
20
MAX.
700
700
400
8
16
32
1.0
15
50
UNIT
V
V
V
A
A
W
V
ns
PINNING - SOT186A
PIN DESCRIPTION
1 base
2 collector
3 emitter
case isolated
PIN CONFIGURATION
case
12 3
SYMBOL
c
b
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VCESM
VCEO
VCBO
IC
ICM
IB
IBM
Ptot
Tstg
Tj
Collector to emitter voltage
Collector to emitter voltage (open base)
Collector to base voltage (open emitter)
Collector current (DC)
Collector current peak value
Base current (DC)
Base current peak value
Total power dissipation
Storage temperature
Junction temperature
VBE = 0 V
Ths ≤ 25 ˚C
THERMAL RESISTANCES
SYMBOL
Rth j-hs
Rth j-a
PARAMETER
Junction to mounting base
Junction to ambient
CONDITIONS
With heatsink compound
in free air
MIN.
-
-
-
-
-
-
-
-
-65
-
MAX.
700
400
700
8
16
4
8
32
150
150
UNIT
V
V
V
A
A
A
A
W
˚C
˚C
TYP.
-
55
MAX.
3.95
-
UNIT
K/W
K/W
February 1999
1
Rev 1.000
1 page  
Philips Semiconductors
Silicon Diffused Power Transistor
Product specification
BUJ105AX
Zth / (K/W)
10
BU1706AX
0.5
1 0.2
0.1
0.05
0.1 0.02
0.01
D=0
PD tp
tp
D= T
Tt
0.001
1u 10u 100u 1m 10m 100m 1 10 100
t/s
Fig.13. Transient thermal impedance.
Zth j-hs = f(t); parameter D = tp/T
VCC
IC/A
11
10
9
8
7
6
5
-5V
4
-3V
3
2 -1V
1
0
0
Fig.15.
100
200
300
400
500
VCEclamp/V
600
700
800
Reverse bias safe operating area (Tj < Tjmax)
for -Vbe = 5V,3V & 1V.
IBon
-VBB
LC
VCL
LB
T.U.T.
Fig.14. Test circuit for reverse bias safe operating
area.
Vclamp < 700V; Vcc = 150V; -Vbe = 5V,3V & 1V;
LB = 1µH; LC = 200µH.
February 1999
5
Rev 1.000
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet BUJ105AX.PDF ] | |
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