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PDF PCD5090H Data sheet ( Hoja de datos )
| Número de pieza | PCD5090H | |
| Descripción | DECT baseband controllers | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
DATA SHEET
PCD5090; PCA5097
DECT baseband controllers
Objective specification
File under Integrated Circuits, IC17
1996 Oct 17
1 page  
Philips Semiconductors
DECT baseband controllers
Objective specification
PCD5090; PCA5097
1996 Oct 17
5
5 Page 
Philips Semiconductors
DECT baseband controllers
Objective specification
PCD5090; PCA5097
FUNCTIONAL DESCRIPTION
DECT controller system description
The PCX509x is a family of single-chip controllers,
designed for use in Digital Enhanced Cordless
Telecommunications (DECT) systems. The family is
designed for minimal component-count and minimum
power consumption. All controllers include an embedded
80C51 microcontroller with on-chip memory and I2C-bus.
The Philips DECT RF-Interface is implemented. The Burst
Mode Logic performs the time-critical MAC layer functions
for applications in DECT handsets and base stations.
The ADPCM transcoding is in compliance with the CCITT
recommendation G.721 and includes receive and transmit
filters.
Power-on reset logic and power management functions
further reduce power consumption and external
components. The chip is intended to support stand-alone
systems only. There are no provisions to build clusters of
base stations. There are no provisions for external
controllers to exert control over the embedded 80C51 or to
have direct access to the on-chip data memories.
The DECT controller consists of a number of functional
blocks that operate more or less autonomously and
communicate with each other via the System Data RAM
(SDR). Blocks have access to SDR via the Internal System
Bus (ISB). The ISB consists of an 8-bit data, a 10-bit
address bus and a number of bus-request/bus-grant
signals. Access to the ISB is controlled by ISB bus
Controller (IBC). The IBC acknowledges bus requests on
the basis of a priority scheme.
The embedded controller 80C51 is to be programmed by
the user. It must contain DECT software from
Man-Machine-Interface (MMI) to the DECT protocols TBC,
CBC and DBC (refer to figures 10, 11, 12 and 13 in
“prETS 300 175-2:1992 section 6”).
All software is available from Philips Semiconductors.
Hardware state machines in the Burst Mode Logic (BML)
and the Speech Interface (SPI) execute the lower blocks in
the TBC, CBC and DBC. The 80C51 has control over the
BML and the SPI via tables in SDR. The BML saves serial
data, received via R_DATAP/M, in buffer areas in SDR.
The position of buffers in SDR is fixed by the 80C51
software by means of tables previously mentioned.
A-fields and B-fields are stored in separate buffers. In this
way, two traffic bearers, each with their private A-fields,
can share the same B-field buffer as is required in case of
bearer hand-over or local call.
The blocks DSP and CODEC support speech processing
functions such as A/D- and D/A conversion, filtering,
ADPCM encoding and decoding, 8-bit A-law PCM to 14-bit
linear PCM conversion and its reverse, echo cancelling,
tone generation, etc.
PCA5097
This chip is intended for program development. It contains
64 kbytes of internal program memory (FEEPROM) for the
80C51 and DSP program RAM.
PCD5090/xxx
This chip is intended for handset and base station
applications. The DSP program is now fixed in a ROM, for
which several ROM codes (/xxx) are available (handset,
analog base, digital base). An external program memory
for the 80C51 of 128 kbytes ROM can be handled.
PCA5097/xxx
This is the same as PCD5090/xxx, but there is 64 kbytes
internal program memory (FEEPROM) for the 80C51.
The DSP program is preprogrammed in ROM.
This chip is meant for development purpose only.
1996 Oct 17
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet PCD5090H.PDF ] | |
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