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Número de pieza | UM_S3C2501X | |
Descripción | 32-BIT RISC MICROPROCESSOR | |
Fabricantes | Samsung semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de UM_S3C2501X (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! S3C2501X
32-BIT RISC
MICROPROCESSOR
USER'S MANUAL
Revision 1
1 page Table of Contents (Continued)
Chapter 3
Instruction Set (Continued)
3.10 Halfword and Signed Data Transfer (LDRH/STRH/LDRSB/LDRSH).................................................3-34
3.10.1 Offsets and Auto-Indexing ....................................................................................................3-35
3.10.2 Half-Word Load and Stores ..................................................................................................3-36
3.10.3 Signed Byte and Half-Word Loads ........................................................................................3-36
3.10.4 Endianness and Byte/Half-Word Selection............................................................................3-36
3.10.5 Use of R15 ...........................................................................................................................3-37
3.10.6 Data Aborts...........................................................................................................................3-37
3.10.7 Instruction Cycle Times ........................................................................................................3-37
3.10.8 Assembler Syntax.................................................................................................................3-38
3.11 Block Data Transfer (LDM, STM) .....................................................................................................3-40
3.11.1 The Register List...................................................................................................................3-40
3.11.2 Addressing Modes ................................................................................................................3-41
3.11.3 Address Alignment................................................................................................................3-41
3.11.4 Use of the S Bit ....................................................................................................................3-43
3.11.5 Use of R15 as the Base ........................................................................................................3-43
3.11.6 Inclusion of the Base in the Register List...............................................................................3-44
3.11.7 Data Aborts...........................................................................................................................3-44
3.11.8 Instruction Cycle Times ........................................................................................................3-44
3.11.9 Assembler Syntax.................................................................................................................3-45
3.12 Single Data Swap (SWP) .................................................................................................................3-47
3.12.1 Bytes and Words ..................................................................................................................3-47
3.12.2 Use of R15 ...........................................................................................................................3-47
3.12.3 Data Aborts...........................................................................................................................3-48
3.12.4 Instruction Cycle Times ........................................................................................................3-48
3.12.5 Assembler Syntax.................................................................................................................3-48
3.13 Software Interrupt (SWI) ..................................................................................................................3-49
3.13.1 Return from the Supervisor...................................................................................................3-49
3.13.2 Comment Field .....................................................................................................................3-49
3.13.3 Instruction Cycle Times ........................................................................................................3-49
3.13.4 Assembler Syntax.................................................................................................................3-50
3.14 Coprocessor Data Operations (CDP)................................................................................................3-51
3.14.1 Coprocessor Instructions.......................................................................................................3-51
3.14.2 The Coprocessor Fields ........................................................................................................3-51
3.14.3 Instruction Cycle Times ........................................................................................................3-52
3.14.4 Assembler Syntax.................................................................................................................3-52
3.15 Coprocessor Data Transfers (LDC, STC) .........................................................................................3-53
3.15.1 The Coprocessor Fields ........................................................................................................3-53
3.15.2 Addressing Modes ................................................................................................................3-54
3.15.3 Address Alignment................................................................................................................3-54
3.15.4 Use of R15 ...........................................................................................................................3-54
3.15.5 Data Aborts...........................................................................................................................3-54
3.15.6 Instruction Cycle Times ........................................................................................................3-54
3.15.7 Assembler Syntax.................................................................................................................3-55
S3C2501X
v
5 Page Table of Contents (Continued)
Chapter 10 Serial I/O (Console UART)
10.1 Overview .........................................................................................................................................10-1
10.2 Features ..........................................................................................................................................10-1
10.3 Console UART Special Registers.....................................................................................................10-3
10.3.1 Console UART Control Registers..........................................................................................10-4
10.3.2 Console UART Status Registers ...........................................................................................10-8
10.3.3 Console UART Interrupt Enable Register ..............................................................................10-11
10.3.4 UART Transmit Data Register ..............................................................................................10-13
10.3.5 UART Receive Data Register ...............................................................................................10-14
10.3.6 UART Baud Rate Divisor Register ........................................................................................10-15
10.3.7 Console UART Baud Rate Examples....................................................................................10-16
10.3.8 UART Control Character Register 1 and 2 ............................................................................10-17
Chapter 11Serial I/O (High-Speed UART)
11.1 Overview .........................................................................................................................................11-1
11.2 Features ..........................................................................................................................................11-1
11.3 High-Speed UART Special Registers ...............................................................................................11-3
11.3.1 High-Speed UART Control Registers ....................................................................................11-4
11.3.2 High-Speed UART Status Registers......................................................................................11-9
11.3.3 High-Speed UART Interrupt Enable Register ........................................................................11-14
11.3.4 High-Speed UART Transmit Buffer Register .........................................................................11-16
11.3.5 High-Speed UART Receive Buffer Register..........................................................................11-17
11.3.6 High-Speed UART Baud Rate Divisor Register.....................................................................11-18
11.3.7 High-Speed UART Baud Rate Examples ..............................................................................11-19
11.3.8 High-Speed UART Control Character 1 Register...................................................................11-20
11.3.9 High-Speed UART Control Character 2 Register...................................................................11-21
11.3.10 High-Speed UART Autoband Boundary Register.................................................................11-22
11.3.11 High-Speed UART Autobaud Table Regsiter.......................................................................11-23
11.4 High-Speed UART Operation ...........................................................................................................11-24
11.4.1 FIFO Operation ....................................................................................................................11-24
11.4.2 Hardware Flow Control .........................................................................................................11-24
11.4.3 Software Flow Control...........................................................................................................11-26
11.4.4 Auto Baud Rate Detection.....................................................................................................11-26
Chapter 12I/O Ports
12.1 Overview .........................................................................................................................................12-1
12.2 Features ..........................................................................................................................................12-1
12.3 I/O Port Special Register..................................................................................................................12-2
12.3.1 I/O Port Mode Select Register ..............................................................................................12-2
12.3.2 I/O Port Function Control Register ........................................................................................12-4
12.3.3 I/O Port Control Register for GDMA......................................................................................12-7
12.3.4 I/O Port Control Register for External Interrupt .....................................................................12-8
12.3.5 I/O Port External Interrupt Clear Register..............................................................................12-10
12.3.6 I/O Port Data Register ..........................................................................................................12-11
12.3.7 I/O Port Drive Control Register .............................................................................................12-11
S3C2501X
xi
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet UM_S3C2501X.PDF ] |
Número de pieza | Descripción | Fabricantes |
UM_S3C2501X | 32-BIT RISC MICROPROCESSOR | Samsung semiconductor |
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