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PCF80C31BH4-24P 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
80C31/80C51/87C51
CMOS single-chip 8-bit microcontrollers
Product specification
IC20 Data Handbook
1996 Aug 16
Philips
Semiconductors




PCF80C31BH4-24P pdf, 반도체, 판매, 대치품
Philips Semiconductors
CMOS single-chip 8-bit microcontrollers
Product specification
80C31/80C51/87C51
ORDERING INFORMATION
EPROM
DRAWING
NUMBER
ROMless
ROM
PHILIPS NORTH AMERICA
DRAWING
NUMBER
TEMPERATURE RANGE oC
AND PACKAGE1
Freq
MHz
SC87C51CCF40 0590B
0 to +70, Ceramic Dual In-line Package, UV 3.5 to 12
SC87C51CCK44 1472A
0 to +70, Ceramic Leaded Chip Carrier, UV
3.5 to 12
SC87C51CCN40 SOT129-1 SC80C31BCCN40 SC80C51BCCN40 SOT129-1 0 to +70, Plastic Dual In-line Package, OTP 3.5 to 12
SC87C51CCA44 SOT187-2 SC80C31BCCA44 SC80C51BCCA44 SOT187-2 0 to +70, Plastic Leaded Chip Carrier, OTP
3.5 to 12
SC87C51CCB44 SOT307-2 SC80C31BCCB44 SC80C51BCCB44 SOT307-2 0 to +70, Plastic Quad Flat Pack, OTP
3.5 to 12
SC87C51ACF40 0590B
–40 to +85, Ceramic Dual In-line Package, UV 3.5 to 12
SC87C51ACN40 SOT129-1 SC80C31BACN40 SC80C51BACN40 SOT129-1 –40 to +85, Plastic Dual In-line Package, OTP 3.5 to 12
SC87C51ACA44 SOT187-2 SC80C31BACA44 SC80C51BACA44 SOT187-2 –40 to +85, Plastic Leaded Chip Carrier, OTP 3.5 to 12
SC87C51ACB44 SOT307-2 SC80C31BACB44 SC80C51BACB44 SOT307-2 –40 to +85, Plastic Quad Flat Pack, OTP
3.5 to 12
SC87C51CGF40 0590B
0 to +70, Ceramic Dual In-line Package, UV 3.5 to 16
SC87C51CGK44 1472A
0 to +70, Ceramic Leaded Chip Carrier, UV
3.5 to 16
SC87C51CGN40 SOT129-1 SC80C31BCGN40 SC80C51BCGN40 SOT129-1 0 to +70, Plastic Dual In-line Package, OTP 3.5 to 16
SC87C51CGA44 SOT187-2 SC80C31BCGA44 SC80C51BCGA44 SOT187-2 0 to +70, Plastic Leaded Chip Carrier, OTP
3.5 to 16
SC87C51CGB44 SOT307-2 SC80C31BCGB44 SC80C51BCGB44 SOT307-2 0 to +70, Plastic Quad Flat Pack, OTP
3.5 to 16
SC87C51AGF40 0590B
–40 to +85, Ceramic Dual In-line Package, UV 3.5 to 16
SC87C51AGN40 SOT129-1 SC80C31BAGN40 SC80C51BAGN40 SOT129-1 –40 to +85, Plastic Dual In-line Package, OTP 3.5 to 16
SC87C51AGA44 SOT187-2 SC80C31BAGA44 SC80C51BAGA44 SOT187-2 –40 to +85, Plastic Leaded Chip Carrier, OTP 3.5 to 16
SC87C51AGB44 SOT307-2 SC80C31BAGB44 SC80C51BAGB44 SOT307-2 –40 to +85, Plastic Quad Flat Pack, OTP
3.5 to 16
SC87C51CPF40 0590B
0 to +70, Ceramic Dual In-line Package, UV
SC87C51CPK44 1472A
0 to +70, Ceramic Leaded Chip Carrier, UV
SC87C51CPN40 SOT129-1 SC80C31BCPN40 SC80C51BCPN40 SOT129-1 0 to +70, Plastic Dual In-line Package, OTP
SC87C51CPA44 SOT187-2 SC80C31BCPA44 SC80C51BCPA44 SOT187-2 0 to +70, Plastic Leaded Chip Carrier, OTP
3.5 to 24
3.5 to 24
3.5 to 24
3.5 to 24
SC87C51APF40
SC87C51APN40
SC87C51APA44
0590B
SOT129-1 SC80C31BAPN40
SOT187-2 SC80C31BAPA44
SC80C51BAPN40
SC80C51BAPA44
–40 to +85, Ceramic Dual In-line Package, UV
SOT129-1 –40 to +85, Plastic Dual In-line Package, OTP 3.5 to 24
SOT187-2 –40 to +85, Plastic Leaded Chip Carrier, OTP 3.5 to 24
SC87C51CYF40 0590B
0 to +70, Ceramic Dual In-line Package, UV
SC87C51CYK44 1472A
0 to +70, Ceramic Leaded Chip Carrier, UV
SC87C51CYN40 SOT129-1 SC80C31BCYN40 SC80C51BCYN40 SOT129-1 0 to +70, Plastic Dual In-line Package, OTP
SC87C51CYA44 SOT187-2 SC80C31BCYA44 SC80C51BCYA44 SOT187-2 0 to +70, Plastic Leaded Chip Carrier, OTP
3.5 to 33
3.5 to 33
3.5 to 33
3.5 to 33
1. OTP = One Time Programmable EPROM. UV = UV Erasable EPROM
2. SOT311 replaced by SOT307-2.
1996 Aug 16
4

4페이지










PCF80C31BH4-24P 전자부품, 판매, 대치품
Philips Semiconductors
CMOS single-chip 8-bit microcontrollers
Product specification
80C31/80C51/87C51
PIN DESCRIPTION
PIN NO.
MNEMONIC DIP LCC QFP TYPE
NAME AND FUNCTION
VSS
VCC
P0.0–0.7
P1.0–P1.7
20 22 16
I Ground: 0V reference.
40 44 38
I Power Supply: This is the power supply voltage for normal, idle, and power-down
operation.
39–32 43–36 37–30 I/O Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to
them float and can be used as high-impedance inputs. Port 0 is also the multiplexed
low-order address and data bus during accesses to external program and data memory. In
this application, it uses strong internal pull-ups when emitting 1s. Port 0 also outputs the
code bytes during program verification in the 87C51. External pull-ups are required during
program verification.
1–8 2–9 40-44, I/O Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that have 1s
1–3 written to them are pulled high by the internal pull-ups and can be used as inputs. As
inputs, port 1 pins that are externally pulled low will source current because of the internal
pull-ups. (See DC Electrical Characteristics: IIL). Port 1 also receives the low-order address
byte during program memory verification.
P2.0–P2.7
21–28 24–31 18–25 I/O Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As
inputs, port 2 pins that are externally being pulled low will source current because of the
internal pull-ups. (See DC Electrical Characteristics: IIL). Port 2 emits the high-order
address byte during fetches from external program memory and during accesses to
external data memory that use 16-bit addresses (MOVX @DPTR). In this application, it
uses strong internal pull-ups when emitting 1s. During accesses to external data memory
that use 8-bit addresses (MOV @Ri), port 2 emits the contents of the P2 special function
register.
P3.0–P3.7
10–17 11,
5,
13–19 7–13
10 11
5
11 13
7
12 14
8
13 15
9
14 16 10
15 17 11
16 18 12
17 19 13
I/O Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As
inputs, port 3 pins that are externally being pulled low will source current because of the
pull-ups. (See DC Electrical Characteristics: IIL). Port 3 also serves the special features of
the 80C51 family, as listed below:
I RxD (P3.0): Serial input port
O TxD (P3.1): Serial output port
I INT0 (P3.2): External interrupt
I INT1 (P3.3): External interrupt
I T0 (P3.4): Timer 0 external input
I T1 (P3.5): Timer 1 external input
O WR (P3.6): External data memory write strobe
O RD (P3.7): External data memory read strobe
RST
9 10 4
I Reset: A high on this pin for two machine cycles while the oscillator is running, resets the
device. An internal diffused resistor to VSS permits a power-on reset using only an external
capacitor to VCC.
ALE/PROG 30 33 27 I/O Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the
address during an access to external memory. In normal operation, ALE is emitted at a
constant rate of 1/6 the oscillator frequency, and can be used for external timing or clocking.
Note that one ALE pulse is skipped during each access to external data memory. This pin is
also the program pulse input (PROG) during EPROM programming.
PSEN
29 32 26 O Program Store Enable: The read strobe to external program memory. When the device is
executing code from the external program memory, PSEN is activated twice each machine
cycle, except that two PSEN activations are skipped during each access to external data
memory. PSEN is not activated during fetches from internal program memory.
EA/VPP
XTAL1
XTAL2
31 35 29
I External Access Enable/Programming Supply Voltage: EA must be externally held low
to enable the device to fetch code from external program memory locations 0000H to
0FFFH. If EA is held high, the device executes from internal program memory unless the
program counter contains an address greater than 0FFFH. This pin also receives the
12.75V programming supply voltage (VPP) during EPROM programming.
19 21 15
I Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator
circuits.
18 20 14 O Crystal 2: Output from the inverting oscillator amplifier.
1996 Aug 16
7

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