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What is VV5404?

This electronic component, produced by the manufacturer "STMicroelectronics", performs the same function as "Mono and Colour Digital Video CMOS Image Sensors".


VV5404 Datasheet PDF - STMicroelectronics

Part Number VV5404
Description Mono and Colour Digital Video CMOS Image Sensors
Manufacturers STMicroelectronics 
Logo STMicroelectronics Logo 


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VV5404 & VV6404
®
Mono and Colour Digital Video CMOS Image Sensors
DESCRIPTION
VV5404 and VV6404 are highly integrated CMOS VLSI
sensors which enables high standards of performance and
image quality at a very cost-effective price point. The 356 x
292 monochrome device offers one of the simplest routes
currently available to design-in of imaging applications, while
the colour device is ideal for low cost PC camera applications.
Both devices incorporate a comprehensive range of on-board
controls eliminating the need for additional support chips. On-
chip A/D conversion provides 8 bit digital output and the
device set up is fully automatic via the built-in automatic black
level calibration algorithm.
Exposure and gain settings are programmable and operation
is controlled via a serial interface.
This sensors offer variable frame rates of up to 30 frames per
second and a 4 wire digital video bus. The digital interface
also provides a tri-stateable data qualification clock and frame
synchronisation signal.
Hand-held products, in applications such as PDAs, bar code
scanning or automatic meter reading, will benefit from the low
power requirements and from the inbuilt sleep and power
down modes.
The price and performance standards introduced with the
VV5404 and VV6404 enable use of an imaging solution
where previously it may not have been practicable on cost
grounds.
BLOCK DIAGRAM
CLKI
CLKO
SIN
BLACK
CALIBRATION
IM A G E
FORMAT
EXPOSURE
R E G IS T E R S
SERIAL
IN T E R -
FACE
VERTICAL
SHIFT
R E G IS T E R
ANALOG
VOLTAGE
REFS.
PHOTO DIODE
ARRAY
SAMPLE & HOLD
HORIZONTAL SHIFT
REGISTER
OUTPUT
FORMAT
8-bit
ADC
GAIN
STAGE
SDA
SCL
D[3:0]
QCK
FST
OEB
FEATURES
• CIF Format mono or colour pixel array
• Up to 30 frames per second operation
• On-chip 8 bit analogue to digital converter
• Low power consumption
• Up to 356 x 292 pixel image size
• Automatic exposure and gain control
• Serial interface control
• Programmable exposure and gain values
• Automatic black level calibration
• 4-wire digital video bus
• Evaluation kit available
APPLICATIONS
• PC Cameras
• Biometrics
• Inspection Systems
SPECIFICATIONS
Pixel resolution 356 x 292 (CIF)
Array size
4.272mm x 3.212mm
Pixel size
12.0 µm x 11.0 µm
Min. illumination 0.1 lux
Exposure control Automatic (to 25000:1)
Gain control
Automatic (to +20dB)
Signal/Noise ratio 46dB
Supply voltage
5.0v DC +/− 5%
Supply current
<75mA
Operating
temperature
(ambient)
0oC - 40oC
(for extended temp. info please con-
tact STMicroelectronics)
Package type
48LCC
Important:
1. A colour co-processor is required to convert the VV6404 sensor’s video
data stream of raw colourised pixel data into either a CIF or QCIF for-
mat RGB or YUV colour image.
2. VV5404 and VV6404 do NOT have any form of automatic exposure
control. This must be performed externally.
CD5404-6404F-A
1/54

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VV5404 equivalent
VV5404 & VV6404
1. Fast QCK: the falling edge of the clock qualifies the nibble data irrespective of whether it is the most or the least
significant nibble.
2. Slow QCK: the rising edge of the clock qualifies the most significant nibbles while the falling edge of the clock
qualifies the least significant nibbles.
The FST can be enabled/disabled via the serial interface.
OEB tri-states all 4 databus lines, D[3:0], the qualification clock, QCK and the frame start signal, FST.
There are 3 main ways of interfacing to the VV5404 or VV6404 sensor based on the above signals:
1. The processor capturing the data (or colour co-processor for VV6404) supplies the sensor clock, CKI, and uses
the embedded control sequences to synchronise with the frame and line level timings. Thus the processor and
sensor are running off derivatives of the same fundamental clock (4 fsc - 14.31818 MHz). To allow the receiver
to determine the best sampling position of the video data, during its power-up sequence the sensor outputs a
101010... sequence on each of its databus lines for the video processor to lock on to.
2. The video processor uses a free-running QCK supplied by the sensor to sample the incoming video data
stream. The embedded control sequences are used to synchronise the frame and line level timings. A crystal is
used to generate the clock for the sensor.
3. The video processor uses FST and the data only mode for QCK to synchronise to the incoming video data. Pri-
marily intended for interfacing to frame grabbers.
The 2-wire serial interface provides complete control over how the sensor is setup and run. Exposure and gain values
are programmed via this interface. Section 5. defines the communications protocol and the register map of all the
locations which can be accessed via the serial interface.
Sensor
D[3:0]
CLKI
SDA
Colour
Co-processor
(processor)
SCL
Sensor
D[3:0]
QCK
FST
SDA
Colour
Co-processor
(processor)
SCL
Figure 2 : Interfacing Options
Using the first two interface options outlined above it is possible to control the sensor and receive video data via a 9-
wire cable between the sensor and the video processor/colour-processor.
1. A 4-wire data bus (D[3:0]) for sending both video data and embedded timing references.
2. A 2-wire serial interface (SDA,SCL).
3. The clock for the sensor or QCK from the sensor.
4. VCC and GND power lines.
The various image read-out and frame rate options are detailed in Sections 2 and 3 respectively.
5/54
CD5404-6404F-A


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