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W78C354 데이터시트 PDF




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W78C354 데이터시트, 핀배열, 회로
Preliminary W78C354
MONITOR MICROCONTROLLER
GENERAL DESCRIPTION
The W78C354 is a high-performance monitor microcontroller that is based on the embedded 80C32
microcontroller core. The W78C354 includes a 16 KB ROM, 512 byte internal data RAM, a 6-bit A/D
converter, two 12-bit and fourteen 8-bit PWM static DACs, one 12-bit and three 8-bit PWM dynamic
DACs, a sync processor, an I2C port, a DDC port, a watchdog timer, and glue logic specially designed
for monitor applications.
The W78C354 is suitable for monitors applying VESA DDC1/DDC2B/DDC2B+. This product's high
level of integration and the availability of a one-time programmable (OTP) flash PROM version(the
W78E354) help to reduce unit costs, development costs, and development time.
FEATURES
80C32 MCU core included
20 MHz maximum operating frequency
16 KB ROM for program storage
512 bytes of on-chip data RAM:
Lower 256 bytes accessed as in the 80C32
Higher 256 bytes accessed as an external data memory via "MOVX @Ri".
One SPI/RS232 port (80C32 standard serial port)
One external interrupt input
Two timers/counters
One 8-bit auto-reload timer for software time base
PWM DACs:
Two 12-bit PWM/BRM static DACs
Fourteen 8-bit PWM static DACs
One 12-bit PWM/BRM dynamic DAC
Three 8-bit PWM dynamic DACs
One 6-bit ADC with 4 multiplexed analog inputs
Sync processor:
Horizontal & vertical polarity detector
Sync separator for composite sync
Horizontal & vertical frequency counter
Programmable dummy frequency generator
Programmable H-clamp pulse output
Safe operation area (SOA) output
Self-test pattern output
One software I2C port
One DDC port (master/slave mode I2C, supports DDC1/DDC2B/DDC2B+)
Watchdog timer
Moire cancellation
Two 15 mA output pins for driving LED
Power-low reset
OTP type: W78E354 (16 KB flash PROM)
Three package types:
PLCC68 (W78C/E354P), DIP48 (W78C/E354E), DIP40 (W78C/E354)
Publication Release Date: October 1996
- 1 - Revision A1




W78C354 pdf, 반도체, 판매, 대치품
W78C354
PIN DESCRIPTION
PIN NAME
I/O TYPE
SDAC07
O
SDAC813
O
BSDAC01
O
DDAC02
O
BDDAC
O
ADC0
ADC1
ADC2 (P1.6)
ADC3 (P1.7)
P1.0P1.1
I
I/O
P1.2 (DSCL)
P1.3 (DSDA)
I/O
P1.4
(HCLAMP)
I/O
P1.5 (SOA)
P2.0P2.1
I/O
I/O
FUNCTION
8-bit PWM static DAC output.
Sink/source current 4 mA/-4 mA.
8-bit PWM static DAC output.
Sink/source current 4 mA/-4 mA.
12-bit PWM/BRM static DAC output.
Sink/source current 8 mA/-8 mA.
8-bit PWM dynamic DAC output.
Sink/source current 8 mA/-8 mA.
12-bit PWM/BRM dynamic DAC output.
Sink/source current 8 mA/-8 mA.
Analog signal input channel to AD converter.
Alternate function:
ADC2: P1.6 input (input only).
ADC3: P1.7 input (input only).
General purpose I/O.
Open-drain, Sink current 2 mA.
General purpose I/O.
Open-drain, Sink current 6 mA.
Alternate function:
P1.2: DDC port serial clock DSCL.
P1.3: DDC port serial data DSDA.
General purpose I/O.
Sink/source current 4 mA/-100 µA.
Alternate function:
P1.4: HCLAMP (H-clamp pulse) output.
While outputing special function, P1.4 sink/source current is
4 mA/-4 mA.
General purpose O/P.
Sink/source current 4 mA/-4 mA.
Alternate function:
P1.5: SOA (safe operation area) output.
General purpose I/O.
Sink/source current 15 mA/-100 µA.
-4-

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W78C354 전자부품, 판매, 대치품
W78C354
FUNCTIONAL DESCRIPTION
The W78C354's core architecture consists of an 80C32 MCU surrounded by various special function
registers, or SFRs (some of these are 80C32 standard registers, while others are newly added; see
Table 1), three general purpose I/O ports (P1, P2, and P3), one output-only port (P4), 256 bytes of
scratchpad RAM, two timer/counters (Timer0 and Timer1) and one 80C32 standard serial port. The
processor supports 109 different instructions (without "MOVX A, @DPTR" and "MOVX @DPTR, A"),
which are all compatible with the 80C32 family instruction set.
There are two major differences between the W78C354 and 80C32. First, the W78C354 cannot
access an external program or data memory. This function is unnecessary, because the W78C354's
16 KB of internal ROM and 512 bytes of on-chip RAM should be enough for most monitor
applications. Second, the W78C354 has a number of new SFRs (see Table 2), which provide more
powerful functions.
Table 1. W78C354 special function registers (SFRs)
F8
F0 + B
E8
E0 + ACC
D8 + S1CON
S1STA
S1DAT
S1ADR
D0 + PSW
C8 + CONTREG4
C0
B8 + IP
B0 + P3
A8 + IE
A0 + P2
98 + SCON
90 + P1
SBRM0
ADC
SDAC7
SDAC0
SBUF
AUTOLOAD
SBRM1
INTVECT
SDAC8
SDAC1
BSDAC0
DHREG
PORT4
STATUS
SDAC9
SDAC2
BSDAC1
DVREG
SOAREG
HFCOUNTL
SDAC10
SDAC3
WDTCLR
DDC1
88 + TCON
80 + CONTREG1
TMOD
SP
TL0
DPL
TL1
DPH
TH0
CONTREG5
Notes:
1. SFRs with a "+" are both byte and bit-addressable.
2. The registers in the shaded region are newly added to the 80C32.
SOACLR
HFCOUNTH
SDAC11
SDAC4
DDAC0
INTMSK
TH1
CONTREG2
VFCOUNTL
SDAC12
SDAC5
DDAC1
BDDAC
PARAL
VFCOUNTH
SDAC13
SDAC6
DDAC2
DBRM
PARAH
PCON
FF
F7
EF
E7
DF
D7
CF
C7
BF
B7
AF
A7
9F
97
8F
87
A. Memory Address Space
The W78C354 operates in three separate address spaces:
(1) The first (Figure 1-1) is the 16 KB internal program space (0000H3FFFH).
(2) The second (Figure 1-2) is the data memory space, which is 256 bytes in size (0000H00FFH).
The data memory is integrated inside the chip rather than outside the chip, as in a standard
80C32. This data memory space must be accessed by the "MOVX @Ri" instruction.
(3) The third (Figure 1-3) is the same as in the standard 80C32.
Publication Release Date: October 1996
- 7 - Revision A1

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