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PDF W78C354 Data sheet ( Hoja de datos )
| Número de pieza | W78C354 | |
| Descripción | MONITOR MICROCONTROLLER | |
| Fabricantes | Winbond | |
| Logotipo |  |
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Preliminary W78C354
MONITOR MICROCONTROLLER
GENERAL DESCRIPTION
The W78C354 is a high-performance monitor microcontroller that is based on the embedded 80C32
microcontroller core. The W78C354 includes a 16 KB ROM, 512 byte internal data RAM, a 6-bit A/D
converter, two 12-bit and fourteen 8-bit PWM static DACs, one 12-bit and three 8-bit PWM dynamic
DACs, a sync processor, an I2C port, a DDC port, a watchdog timer, and glue logic specially designed
for monitor applications.
The W78C354 is suitable for monitors applying VESA DDC1/DDC2B/DDC2B+. This product's high
level of integration and the availability of a one-time programmable (OTP) flash PROM version(the
W78E354) help to reduce unit costs, development costs, and development time.
FEATURES
• 80C32 MCU core included
• 20 MHz maximum operating frequency
• 16 KB ROM for program storage
• 512 bytes of on-chip data RAM:
− Lower 256 bytes accessed as in the 80C32
− Higher 256 bytes accessed as an external data memory via "MOVX @Ri".
• One SPI/RS232 port (80C32 standard serial port)
• One external interrupt input
• Two timers/counters
• One 8-bit auto-reload timer for software time base
• PWM DACs:
− Two 12-bit PWM/BRM static DACs
− Fourteen 8-bit PWM static DACs
− One 12-bit PWM/BRM dynamic DAC
− Three 8-bit PWM dynamic DACs
• One 6-bit ADC with 4 multiplexed analog inputs
• Sync processor:
− Horizontal & vertical polarity detector
− Sync separator for composite sync
− Horizontal & vertical frequency counter
− Programmable dummy frequency generator
− Programmable H-clamp pulse output
− Safe operation area (SOA) output
− Self-test pattern output
• One software I2C port
• One DDC port (master/slave mode I2C, supports DDC1/DDC2B/DDC2B+)
• Watchdog timer
• Moire cancellation
• Two 15 mA output pins for driving LED
• Power-low reset
• OTP type: W78E354 (16 KB flash PROM)
• Three package types:
− PLCC68 (W78C/E354P), DIP48 (W78C/E354E), DIP40 (W78C/E354)
Publication Release Date: October 1996
- 1 - Revision A1
1 page  
W78C354
Pin Description, continued
PIN NAME
P2.2
P2.3 (STP)
P2.4 (SDAC10)
P2.5 (SDAC11)
P2.6 (SDAC12)
P2.7 (SDAC13)
I/O TYPE
I/O
P3.0 (RXD)
P3.1 (TXD)
P3.2 (INT0)
P3.3
P3.4 (T0)
P3.5 (T1)
P3.6
P3.7
P4.0−P4.6
I/O
O
HIN I
VIN
HOUT
VOUT
O
RST I
OSCOUT
OSCIN
VPP
VDD
VSS
VAA
VSSA
O
I
I
I
I
I
I
BLOCK DIAGRAM
FUNCTION
General purpose I/O.
Sink/source current 4 mA/-100 µA.
Alternate function:
P2.3: STP (Self-Test Pattern) output.
P2.4−P2.7: SDAC10−13 outputs.
While outputing special function, P2.3−P2.7 sink/source
current is 4 mA/-4 mA.
General purpose I/O.
Sink/Source current 2 mA/-100 µA.
Alternate function:
P3.0: Serial input port.
P3.1: Serial output port.
P3.2: External interrupt input.
P3.4, P3.5: Timer/counter 0, 1 external inputs.
Output port.
Sink/source current 2 mA/-2 mA.
HIN: Hsync/composite sync input.
VIN: Vsync input.
Schmitt trigger input pin.
HOUT: Hsync output.
VOUT: Vsync output.
Sink/source current 4 mA/-4 mA.
Reset the controller (active low).
Schmitt trigger input pin.
Output from inverting oscillator amplifier.
Input to inverting oscillator amplifier.
High voltage supply input for flash PROM.
Positive power supply for digital circuit, +5V.
Digital ground.
Positive power supply for analog circuit, +5V.
Analog ground.
Publication Release Date: October 1996
- 5 - Revision A1
5 Page 
W78C354
Table 2. New special function registers, continued
REGISTER ADDRESS
FUNCTION
LENGTH
13 BSDAC0
14 BSDAC1
15 WDTCLR
16 DDAC0
17 DDAC1
18 DDAC2
19 SDAC0
20 SDAC1
21 SDAC2
22 SDAC3
23 SDAC4
24 SDAC5
25 SDAC6
26 SDAC7
27 SDAC8
28 SDAC9
29 SDAC10
30 SDAC11
31 SDAC12
32 SDAC13
33 ADC
34 INTVECT
35 STATUS
36 HFCOUNTL
37 HFCOUNTH
38 VFCOUNTL
39 VFCOUNTH
40 SBRM0
41 SBRM1
42 PORT4
43 SOAREG
44 SOACLR
45 CONTREG4
46 S1CON
47 S1STA
48 S1DAT
49 S1ADR
9AH
9BH
9CH
9DH
9EH
9FH
A1H
A2H
A3H
A4H
A5H
A6H
A7H
A9H
AAH
ABH
ACH
ADH
AEH
AFH
B1H
B2H
B3H
B4H
B5H
B6H
B7H
B9H
BAH
BBH
BCH
BDH
C8H
D8H
D9H
DAH
DBH
8-bit PWM register for 12-bit PWM/BRM Static DAC0
8-bit PWM register for 12-bit PWM/BRM Static DAC1
Watch-dog timer clear register
8-bit PWM dynamic DAC0 register
8-bit PWM dynamic DAC1 register
8-bit PWM dynamic DAC2 register
8-bit PWM static DAC0 register
8-bit PWM static DAC1 register
8-bit PWM static DAC2 register
8-bit PWM static DAC3 register
8-bit PWM static DAC4 register
8-bit PWM static DAC5 register
8-bit PWM static DAC6 register
8-bit PWM static DAC7 register
8-bit PWM static DAC8 register
8-bit PWM static DAC9 register
8-bit PWM static DAC10 register
8-bit PWM static DAC11 register
8-bit PWM static DAC12 register
8-bit PWM static DAC13 register
6-bit ADC result register
Interrupt vector register
Status register
Horizontal frequency counter low byte register
Horizontal frequency counter high byte register
Vertical frequency counter low byte register
Vertical frequency counter high byte register
4-bit BRM register for 12-bit PWM/BRM Static DAC0
4-bit BRM register for 12-bit PWM/BRM Static DAC1
Output latch register
Safe operation area register
Safe operation area clear register
Control register 4
SIO1 port control register
SIO1 port status register
SIO1 port data register
SIO1 port address register
Notes:
1. "-" means the SFR has no real hardware but only an address.
2. Three SFRs (CONTREG1, CONTREG4, SICON) can be accessed by bit addressing.
D. Status and Control Register Overview
1. STATUS: Status Register
8
8
-
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
4
8
8
8
8
4
4
7
8
-
8
8
8
8
8
R/W
TYPE
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R/W
R
R
R
R
R
W
W
W
W
W
R/W
R/W
R
R/W
R/W
RESET
CONTENT
00H
00H
-
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
-
00H
00H
F8H
00H
00H
- 11 -
Publication Release Date: October 1996
Revision A1
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet W78C354.PDF ] | |
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