Datasheet.kr   

W83194R 데이터시트 PDF




Winbond에서 제조한 전자 부품 W83194R은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 W83194R 자료 제공

부품번호 W83194R 기능
기능 166MHZ CLOCK FOR SIS CHIPSET
제조업체 Winbond
로고 Winbond 로고


W83194R 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




전체 11 페이지수

미리보기를 사용할 수 없습니다

W83194R 데이터시트, 핀배열, 회로
W83194R-630A
166MHZ CLOCK FOR SIS CHIPSET
1. GENERAL DESCRIPTION
The W83194R-630A is a Clock Synthesizer for SiS 540/630 chipset. W83194R-630A provides all
clocks required for high-speed RISC or CISC microprocessor such as AMD,Cyrix,Intel Pentium,
Pentium II and also provides 16 different frequencies of CPU clocks frequency setting. All clocks are
externally selectable with smooth transitions. The W83194R-630A makes SDRAM in synchronous or
asynchronous frequency with CPU clocks.
The W83194R-630A provides I2C serial bus interface to program the registers to enable or disable
each clock outputs and W83194R-630A provides the 0.5%, 0.75% center type and 0~0.5% down type
spread spectrum to reduce EMI.
The W83194R-630A accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply.
High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate into 30
pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads as
maintaining 50± 5% duty cycle. The fixed frequency outputs as REF, 24MHz, and 48 MHz provide
better than 0.5V /ns slew rate.
2. PRODUCT FEATURES
Supports Pentium, PentiumII, AMD and Cyrix CPUs with I2C.
3 CPU clocks
14 SDRAM clocks for 3 DIMMs
7 PCI synchronous clocks.
Optional single or mixed supply:
(All Vdd = 3.3V) or (Other s Vdd = 3.3V, VddLCPU=2.5V)
Skew form CPU to PCI clock 1 to 4 ns, center 2.6 ns
SDRAM frequency synchronous or asynchronous to CPU clocks
Smooth frequency switch with selections from 66 to 166mhz
I2C 2-Wire serial interface and I2C read back
0.5%, 0.75%center type, 0~0.5% down type spread spectrum to reduce EMI
Programmable registers to enable/stop each output and select modes
(mode as Tri-state or Normal )
48 MHz for USB
24 MHz for super I/O
Packaged in 48-pin SSOP
Publication Release Date: Nov. 1999
- 1 - Revision 0.65




W83194R pdf, 반도체, 판매, 대치품
W83194R-630A
PCICLK 1/ *FS2
PCICLK 2/ *MODE
PCICLK [ 3:6 ]
8
9
11,12,13,14
PRELIMINARY
I/O
I/O
OUT
PCI free-running clock during normal operation.
Latched input for FS2 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
PCI clock during normal operation.
Latched input for MODE at initial power up for input
selection of CPU_STOP#, PCI_STOP# and PD#.
When MODE=1, the above pins are SDRAM clock
outputs. When MODE=0, the pins are inputs ACPI
pins.
PCI clock during normal operation.
Low skew (< 250ps) PCI clock outputs.
5.3 I2C Control Interface
SYMBOL
*SDATA
*SDCLK
PIN
23
24
I/O FUNCTION
I/O Serial data of I2C 2-wire control interface
IN Serial clock of I2C 2-wire control interface
5.4 Fixed Frequency Outputs
SYMBOL
REF0X2 / *FS3
PIN
2
REF1
24_48MHz/
SEL2.5_3.3#
48MHz / *FS0
48
25
26
I/O FUNCTION
I/O 3.3V, 14.318MHz reference clock output .
Internal 250kpull-up.
Latched input for FS3 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
I/O 3.3V , 14.318MHz reference clock output.
I/O SEL2.5_3.3# controls the Vdd of CPU. If logic 0 at
power on, VddLCPU=3.3V. If logic 1, VddLCPU=2.5
24MHz or 48MHz selected by I2C for Super I/O.
I/O Internal 250kpull-up.
Latched input for FS0 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks. 48MHz output for USB during normal
operation.
Publication Release Date: Nov. 1999
- 4 - Revision 0.65

4페이지










W83194R 전자부품, 판매, 대치품
W83194R-630A
PRELIMINARY
Frequency table by I2C
SSEL3 SSEL2 SSEL1 SSEL0
CPU
(MHz)
0 0 0 0 66.8
0 0 0 1 100.2
0 0 1 0 83.3
0 0 1 1 133.6
0 1 0 0 75
0 1 0 1 100.2
0 1 1 0 100.2
0 1 1 1 133.6
1 0 0 0 66.8
1 0 0 1 97
1 0 1 0 97
1 0 1 1 95.2
1 1 0 0 140
1 1 0 1 112
1 1 1 0 96.2
1 1 1 1 166
SDRAM
(MHz)
100.2
100.2
124.9
100.2
75
133.6
150.3
133.6
66.8
97
129.3
95.2
140
112
96.2
166
PCI (MHz)
33.4
33.4
33.2
33.4
37.5
33.4
33.4
33.4
33.4
32.3
32.3
31.7
35
37.3
32.1
33.3
REF (MHz)
IOAPIC
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
8.2.1 Register 0: CPU Frequency Select Register (default = 0)
Bit @PowerUp
70
60
50
40
30
20
10
00
Pin Description
- 0 = ±0.5% Center type Spread Spectrum Modulation
1 = ±0.75% Center type Spread Spectrum Modulation
- SSEL2 (for frequency table selection by software via I2C)
- SSEL1 (for frequency table selection by software via I2C)
- SSEL0 (for frequency table selection by software via I2C)
- 0 = Selection by hardware
1 = Selection by software I2C - Bit 2, 6:4
- SSEL3 (for frequency table selection by software via I2C)
- 0 = Normal
1 = Spread Spectrum enabled
- 0 = Running
1 = Tristate all outputs
Publication Release Date: Nov. 1999
- 7 - Revision 0.65

7페이지


구       성 총 11 페이지수
다운로드[ W83194R.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
W83194AR-73

150MHZ CLOCK FOR WHITNEY CHIPSET

Winbond
Winbond
W83194AR-96

200MHZ CLOCK FOR WHITNEY CHIPSET

Winbond
Winbond

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵