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PDF W83194R-58A Data sheet ( Hoja de datos )
| Número de pieza | W83194R-58A | |
| Descripción | 100MHZ AGP CLOCK FOR VIA CHIPSET | |
| Fabricantes | Winbond | |
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W83194R-58A
100MHZ AGP CLOCK FOR VIA CHIPSET
1.0 GENERAL DESCRIPTION
The W83194R-58A is a Clock Synthesizer for VIA chipset. W83194R-58A provides all clocks
required for high-speed RISC or CISC microprocessor such as Intel PentiumII and also provides 16
different frequencies of CPU clocks by software setting. AGP and PCI clocks are externally
selectable with smooth transitions. The W83194R-58A provides AGP clocks especially for clone
chipset, and makes SDRAM in synchronous frequency with CPU or AGP clocks.
The W83194R-58A provides I2C serial bus interface to program the registers to enable or disable
each clock outputs and choose the 0.25%, 0.5% or 0.5%,1.5% center type spread spectrum to reduce
EMI.
The W83194R-58A accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply.
High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate into 30
pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads when
maintaining 50± 5% duty cycle. The fixed frequency outputs as REF, 24MHz, and 48 MHz provide
better than 0.5V /ns slew rate.
2.0 PRODUCT FEATURES
• Supports Pentium™, Pentium™ Pro, Pentium™ II, AMD and Cyrix CPUs with I2C.
• 4 CPU clocks
• 12 SDRAM clocks for 3 DIMs
• Two AGP clocks
• 6 PCI synchronous clocks.
• Optional single or mixed supply:
(Vdd = Vddq3 = Vddq2 = Vddq2b = 3.3V) or (Vdd = Vddq3 = Vddq2 = 3.3V, Vdq2b = 2.5V)
• Skew form CPU to PCI clock -1 to 4 ns, center 2.6 ns, AGP to CPU sync. skew 0 ns (250 ps)
• SDRAM frequency synchronous to CPU or AGP clocks
• Smooth frequency switch with selections from 60 to 100 MHz CPU(-37) and 66 to 150MHz(-58)
• I2C 2-Wire serial interface and I2C read back
• 0~0.5% down type and 0.25%, 0.5% center type spread spectrum to reduce EMI
• Programmable registers to enable/stop each output and select modes
(mode as Tri-state or Normal )
• MODE pin for power Management
• 48 MHz for USB
• 24 MHz for super I/O
• 48-pin SSOP package
Publication Release Date: Nov. 1999
- 1 - Revision 0.30
1 page  
W83194R-58A
5.2 CPU, SDRAM, PCI Clock Outputs, continued
SYMBOL
PIN
PCICLK 0 / *FS2
8
PCICLK [ 1:4 ]
10,11,12,13
PRELIMINARY
I/O
I/O
OUT
FUNCTION
Latched input for FS2 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
PCI clock during normal operation.
Low skew (< 250ps) PCI clock outputs.
5.3 I2C Control Interface
SYMBOL
SDATA
SDCLK
PIN
23
24
I/O FUNCTION
I/O Serial data of I2C 2-wire control interface
IN Serial clock of I2C 2-wire control interface
5.4 Fixed Frequency Outputs
SYMBOL
REF0 / CPU3.3#_2.5
PIN
2
REF1 /*SD_SEL#
24MHz / *MODE
48MHz / *FS0
46
25
26
I/O FUNCTION
I/O Internal 250kΩ pull-up.
Latched input for CPU3.3#_2.5 at initial power up.
Reference clock during normal operation.
Latched high - Vddq2b = 2.5V
Latched low - Vddq2b = 3.3V
I/O Internal 250kΩ pull-up.
Latched input at Power On selects either
CPU(SDSEL=1) or AGP(SD_SEL=0) frequencies for
SDRAM clock outputs.
I/O Internal 250kΩ pull-up.
Latched input for MODE at initial power up. 24MHz
output for super I/O during normal operation.
I/O Internal 250kΩ pull-up.
Latched input for FS0 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks. 48MHz output for USB during normal
operation.
Publication Release Date: Nov. 1999
- 5 - Revision 0.30
5 Page 
W83194R-58A
8.3.7 Register 6: Reserved Register
Bit @PowerUp Pin
7 x - Reserved
6 x - Reserved
5 x - Reserved
4 x - Reserved
3 x - Reserved
2 x - Reserved
1 x - Reserved
0 x - Reserved
Description
PRELIMINARY
9.0 ORDERING INFORMATION
Part Number
W83194R-58A
Package Type
48 PIN SSOP
Production Flow
Commercial, 0°C to +70°C
10.0 HOW TO READ THE TOP MARKING
W83194R-58A
28051234
814GBB
1st line: Winbond logo and the type number: W83194R-58A
2nd line: Tracking code 2 8051234
2: wafers manufactured in Winbond FAB 2
8051234: wafer production series lot number
3rd line: Tracking code 814 G B B
814: packages made in '98, week 14
G: assembly house ID; A means ASE, S means SPIL, G means GR
BB: IC revision
All the trade marks of products and companies mentioned in this data sheet belong to their
respective owners.
- 11 -
Publication Release Date: Nov. 1999
Revision 0.30
11 Page | ||
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