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W83196S-14 데이터시트 PDF




Winbond에서 제조한 전자 부품 W83196S-14은 전자 산업 및 응용 분야에서
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부품번호 W83196S-14 기능
기능 100 MHZ CLOCK FOR BX CHIPSET (2 CHIP)
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W83196S-14 데이터시트, 핀배열, 회로
Preliminary W83196S-14
100 MHZ CLOCK FOR BX CHIPSET (2 CHIP)
1. GENERAL DESCRIPTION
The W83196S-14 is a Clock Synthesizer which provides all clocks required for high-speed RISC or
CISC microprocessor. Twelve different frequency of CPU, and PCI clocks are externally selectable
with smooth transitions.
The W83196S-14 provides I2C serial bus interface to program the registers to enable or disable each
clock outputs and choose the 0.5% center type spread spectrum to reduce EMI.
The W83196S-14 accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply.
High drive PCI CLOCK outputs typically provide greater than 1V/nS slew rate into 30 pF loads. CPU
CLOCK outputs typically provide better than 1V/nS slew rate into 20 pF loads as maintaining 50 ±5%
duty cycle. The fixed frequency outputs as REF, 24 MHz, and 48 MHz provide better than 0.5V/nS
slew rate.
2. FEATURES
Supports PentiumII CPUs with I2C
12 sets of CPU frequencies selection
2 CPU clocks (one free running CPU clock)
7 PCI synchronous clocks(one free running PCI clock)
Optional single or mixed supply:
(VDDR = VDDCore = VDDP = VDD4 = 3.3V ±5%)
(VDDA = VDDC = 2.5V ±5%)
Skew form CPU to PCI clock 1.5 to 4.0 nS, CPU leads.
CPU clock jitter less than 200 pS
PCI_F, PCI1: 6 clock skew less than 500 pS
Smooth frequency switch with selections from 66.8 MHz to 150 MHz CPU
I2C 2-Wire serial interface and I2C read back
±0.5% center type spread spectrum function to reduce EMI
Programmable registers to enable/stop each output and select modes
(mode as Tri-state or Normal )
MODE pin for power management
48 MHz for USB
24 MHz for super I/O
Packaged in 28-pin SOP
Publication Release Date: March 1999
- 1 - Revision A1




W83196S-14 pdf, 반도체, 판매, 대치품
Preliminary W83196S-14
5.4 Fixed Frequency Outputs
SYMBOL
SEL100/66#
IOAPIC
REF2X / SEL48*
24/48MHz
48MHz/Mode*
PIN I/O
FUNCTION
16 IN CPU clock frequency select pin.
24 O Provides 14.318 fixed frequency.
27 I/O Internal 250kpull-up.
Latched input for SEL48* at initial power up.
SEL48* = 1 , pin14 is 24 MHz
SEL48* = 0 , pin14 is 48 MHz
Reference clock during normal operation.
14 O Frequency is set by the state of pin 27 on power up.
13 I/O Internal 250kpull-up.
48 MHz output for USB during normal operation.
Latched input for Mode* at initial power up. Mode* = 0 ,
then pin10 is PCI_STOP#, and pin11 is CPU_STOP#.
Mode* = 1.(default), pin10 is PCICLK5 and pin11 is
PCLCLK6.
5.5 Power Pins
SYMBOL
VDDCore
VDDP
VDDA
VDDC
VDD4
VDDR
VssC, VssR, Vss4,
VssP
PIN FUNCTION
20 Power supply for core logic and PLL circuitry. Connect to 3.3V
supply.
9 Power supply for PCICLK_F and PCICLK 1:6. Connect to 3.3V
supply.
25 Power supply for IOAPIC output, Connect to 2.5V supply
23 Power supply for CPUCLK _F and CPUCLK1. Connect to 2.5V
supply.
12 Power supply for 48mhz USB clock . Connect to 3.3V supply.
26 Power supply for 14.318mhz ISA clock . Connect to 3.3V supply.
3, 15, 19, Circuit Ground.
28
6. FREQUENCY SELECTION
SEL100/66#
1
0
CPUCLK_F, CPUCLK1
100 MHz
66.8 MHz
PCI
33.3 MHz
33.3 MHz
-4-

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W83196S-14 전자부품, 판매, 대치품
Preliminary W83196S-14
(II) Default Frequency table selection by software via I2C (When Register 7 Bit 0 = 1)
SSEL2
0
0
0
0
SSEL1
0
0
1
1
SSEL0
0
1
0
1
CPU, SDRAM (MHZ)
124
150
140
133
PCI (MHZ)
41.3 (CPU/3)
37.5 (CPU/4)
35 (CPU/4)
33.3 (CPU/4)
REF2X (MHZ)
14.318
14.318
14.318
14.318
FUNCTION TABLE
FUNCTION
Description
Tri-State
Normal
CPU
Hi-Z
See table
OUTPUTS
PCI REF2X
Hi-Z Hi-Z
See table
14.318
IOAPIC
Hi-Z
14.318
7.3.2 Register 4 : CPU , 48/24 MHz Clock Register (1 = Enable, 0 = Stopped)
BIT @POWERUP PIN
DESCRIPTION
7 0 - Reserved
6 1 14 24/48 MHz (Active/Inactive)
5 0 - Reserved
4 0 - Reserved
3 0 - Reserved
2 1 21 CPUCLK1 (Active/Inactive)
1 0 - Reserved
0 1 22 CPUCLK_F (Active/Inactive)
7.3.3 Register 5: PCI Clock Register (1 = Enable, 0 = Stopped)
BIT @POWERUP
71
61
51
40
31
21
11
01
PIN DESCRIPTION
4 PCICLK_F (Active/Inactive)
11 PCICLK6 (Active/Inactive)
10 PCICLK5 (Active/Inactive)
- Reserved
8 PCICLK4 (Active/Inactive)
7 PCICLK3 (Active/Inactive)
6 PCICLK2 (Active/Inactive)
5 PCICLK1 (Active/Inactive)
Publication Release Date: March 1999
- 7 - Revision A1

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W83196S-14

100 MHZ CLOCK FOR BX CHIPSET (2 CHIP)

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