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PDF WM8759 Data sheet ( Hoja de datos )
| Número de pieza | WM8759 | |
| Descripción | 24 BIT 192KHZ STEREO DAC WITH HEADPHONE BUFFER | |
| Fabricantes | Wolfson Microelectronics plc | |
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WM8759
24-bit 192kHz Stereo DAC with Headphone Buffer
DESCRIPTION
The WM8759 is a high performance stereo DAC with an
integrated headphone driver. It is designed for audio
applications such as portable DVD, MP3 players or
consumer equipment with line output and headphone output
connections.
The WM8759 supports data input word lengths from 16 to
24-bits and sampling rates up to 192kHz. The WM8759
consists of a serial interface port, digital interpolation filters,
multi-bit sigma delta modulators and stereo DAC in a 14-pin
SOIC package.
The hardware control interface is used for the selection of
audio data interface format, enable and de-emphasis. The
WM8759 supports I2S, right Justified or DSP interfaces.
Operating on split analog digital supplies the WM8759
allows very lower power consumption from the digital
section, whilst supporting large output powers from the
analog headphone driver.
FEATURES
• Stereo DAC with headphone driver
• 50mW power into 16R load on 3.3V supply
• Audio Performance
- 100dB SNR (‘A’ weighted @ 48kHz)
- -88dB THD line level
- -72dB THD headphone
• DAC Sampling Frequency: 8kHz – 192kHz
• Pin Selectable Audio Data Interface Format
- I2S, 16-bit Right Justified or DSP
• 2.7V - 5.5V Supply Operation, Split Analog-digital supplies
• 14-pin SOIC Package
• Typical power consumption 20mW on 2.7V supply
APPLICATIONS
• Portable music Players
• Home music players
• Digital TV
BLOCK DIAGRAM
WOLFSON MICROELECTRONICS plc
www.wolfsonmicro.com
Advanced Information, September 2004, Rev 3.0
Copyright 2004 Wolfson Microelectronics plc
1 page  
Advanced Information
WM8759
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at
or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical
Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30°C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION
Supply voltage
Voltage range digital inputs
Master Clock Frequency
Operating temperature range, TA
Storage temperature prior to soldering
Storage temperature after soldering
MIN MAX
-0.3V
+7V
GND -0.3V
VDD +0.3V
50MHz
-25°C
+85°C
30°C max / 85% RH max
-65°C
+150°C
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AI Rev 3.0 September 2004
5
5 Page 
Advanced Information
WM8759
1/fs
LRCIN
LEFT CHANNEL
RIGHT CHANNEL
BCKIN
DIN
1 BCKIN
123
MSB
n-2 n-1 n
LSB
1 BCKIN
123
MSB
n-2 n-1 n
LSB
Figure 3 I2S Mode Timing Diagram
RIGHT JUSTIFIED MODE
The WM8759 supports word lengths of 16-bits in right justified mode.
In right justified mode, the digital audio interface receives data on the DIN input. Audio Data is
time multiplexed with LRCIN indicating whether the left or right channel is present. LRCIN is also
used as a timing reference to indicate the beginning or end of the data words.
In right justified mode, the minimum number of BCKINs per LRCIN period is 2 times the selected
word length. LRCIN must be high for a minimum of word length BCKINs and low for a minimum of
word length BCKINs. Any mark to space ratio on LRCIN is acceptable provided the above
requirements are met.
In right justified mode, the LSB is sampled on the rising edge of BCKIN preceding a LRCIN
transition. LRCIN is high during the left samples and low during the right samples.
LRCIN
BCKIN
1/fs
LEFT CHANNEL
RIGHT CHANNEL
DIN
123
14 15 16
123
14 15 16
MSB
LSB
MSB
LSB
Figure 4 Right Justified Mode Timing Diagram
DSP MODE
A DSP compatible, time division multiplexed format is also supported by the WM8759. This
format is of the type where a ‘synch’ pulse is followed by two data words (left and right) of
predetermined word length. (16-bits). The ‘synch’ pulse replaces the normal duration LRCIN, and
DSP mode is auto-detected by the shorter than normal duration of the LRCIN. If LRCIN is of 4
BCKIN or less duration, the DSP compatible format is selected. Early and Late clock formats are
supported, selected by the state of the FORMAT pin.
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AI Rev 3.0 September 2004
11
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet WM8759.PDF ] | |
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