X1725636DD8B Datasheet PDF - Xilinx Inc
| Part Number | X1725636DD8B | |
| Description | QPRO Family of XC1700D QML Configuration PROMs | |
| Manufacturers | Xilinx Inc | |
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R QPRO Family of XC1700D QML
Configuration PROMs
DS070 (v2.1) June 1, 2000
02
Features
• Certified to MIL-PRF-38535 Appendix A QML
(Qualified Manufacturer Listing.)
• Also available under the following Standard Microcircuit
Drawings (SMD): 5962-94717 and 5962-95617.
• Configuration one-time programmable (OTP) read-only
memory designed to store configuration bitstreams of
Xilinx FPGA devices
• On-chip address counter, incremented by each rising
edge on the clock input
• Simple interface to the FPGA requires only one user
I/O pin
• Cascadable for storing longer or multiple bitstreams
• Programmable reset polarity (active High or active
Low) for compatibility with different FPGA solutions
• Low-power CMOS EPROM process
• Available in 5V version only
• Programming support by leading programmer
manufacturers.
• Design support using the Xilinx Alliance and
Foundation series software packages.
Product Specification
Description
The XC1700D QPRO™ family of configuration PROMs pro-
vide an easy-to-use, cost-effective method for storing Xilinx
FPGA configuration bitstreams.
When the FPGA is in Master Serial mode, it generates a
configuration clock that drives the PROM. A short access
time after the rising clock edge, data appears on the PROM
DATA output pin that is connected to the FPGA DIN pin. The
FPGA generates the appropriate number of clock pulses to
complete the configuration. Once configured, it disables the
PROM. When the FPGA is in Slave Serial mode, the PROM
and the FPGA must both be clocked by an incoming signal.
Multiple devices can be concatenated by using the CEO
output to drive the CE input of the following device. The
clock inputs and the DATA outputs of all PROMs in this
chain are interconnected. All devices are compatible and
can be cascaded with other members of the family.
For device programming, either the Xilinx Alliance™ or the
Foundation™ series development systems compiles the
FPGA design file into a standard HEX format which is then
transferred to most commercial PROM programmers.
VCC VPP GND
RESET/
OE
or
OE/
RESET
CE
CLK
Address Counter
TC
CEO
EPROM
Cell
Matrix
Output
OE
DATA
DS027_01_021500
Figure 1: Simplified Block Diagram (does not show programming circuit)
© 2000 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS070 (v2.1) June 1, 2000
Product Specification
www.xilinx.com
1-800-255-7778
1
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R QPRO Family of XC1700D QML Configuration PROMs
Standby Mode
The PROM enters a low-power standby mode whenever CE
is asserted High. The output remains in a high impedance
state regardless of the state of the OE input.
Programming
The devices can be programmed on programmers supplied
by Xilinx or qualified third-party vendors. The user must
ensure that the appropriate programming algorithm and the
latest version of the programmer software are used. The
wrong choice can permanently damage the device.
Table 1: Truth Table for XC1700 Control Inputs
Control Inputs
Outputs
RESET
Inactive
CE
Low
Internal Address
If address < TC: increment
If address > TC: don’t change
DATA
Active
High-Z
CEO
High
Low
ICC
Active
reduced
Active
Low
Held reset
High-Z
High
Active
Inactive
High
Not changing
High-Z
High
Standby
Active
High
Held reset
High-Z
High
Standby
Notes:
1. The XC1700 RESET input has programmable polarity
2. TC = Terminal Count = highest address value. TC + 1 = address 0.
Important: Always tie the VPP pin to VCC in your application. Never leave VPP floating.
DS070 (v2.1) June 1, 2000
Product Specification
www.xilinx.com
1-800-255-7778
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for X1725636DD8B electronic component. |
| Information | Total 10 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ X1725636DD8B.PDF Datasheet ] | |
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