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부품번호 | 74HCT192 기능 |
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기능 | Presettable synchronous BCD decade up/down counter | ||
제조업체 | Philips | ||
로고 | |||
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT192
Presettable synchronous BCD
decade up/down counter
Product specification
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors
Presettable synchronous BCD decade
up/down counter
Product specification
74HC/HCT192
PIN DESCRIPTION
PIN NO.
SYMBOL
3, 2, 6, 7
4
5
8
11
12
13
14
15, 1, 10, 9
16
Q0 to Q3
CPD
CPU
GND
PL
TCU
TCD
MR
D0 to D3
VCC
Note
1. LOW-to-HIGH, edge triggered
NAME AND FUNCTION
flip-flop outputs
count down clock input(1)
count up clock input(1)
ground (0 V)
asynchronous parallel load input (active LOW)
terminal count up (carry) output (active LOW)
terminal count down (borrow) output (active LOW)
asynchronous master reset input (active HIGH)
data inputs
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
4
4페이지 Philips Semiconductors
Presettable synchronous BCD decade
up/down counter
Product specification
74HC/HCT192
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
SYMBOL
PARAMETER
tPHL/ tPLH propagation delay
CPU, CPD to Qn
tPHL/ tPLH propagation delay
CPU to TCU
tPHL/ tPLH propagation delay
CPD to TCD
tPHL/ tPLH propagation delay
PL to Qn
tPHL propagation delay
MR to Qn
tPHL propagation delay
Dn to Qn
tPLH propagation delay
Dn to Qn
tPHL/ tPLH
tPHL/ tPLH
tPHL/ tPLH
tTHL/ tTLH
propagation delay
PL to TCU,
PL to TCD
propagation delay
MR to TCU,
MR to TCD
propagation delay
Dn to TCU,
Dn to TCD
output transition time
Tamb (°C)
TEST CONDITIONS
min.
+25
typ. max.
74HC
−40 to +85 −40 to +125
min. max. min. max.
UNIT VCC
(V)
WAVEFORMS
66 215
24 43
19 37
270 325 ns 2.0 Fig.7
54 65
4.5
46 55
6.0
33 125
12 25
10 21
155 190 ns 2.0 Fig.8
31 38
4.5
26 32
6.0
39 125
14 25
11 21
155 190 ns 2.0 Fig.8
31 38
4.5
26 32
6.0
69 215
25 43
20 37
270 325 ns 2.0 Fig.9
54 65
4.5
46 55
6.0
63 200
23 40
18 34
250 300 ns 2.0 Fig.10
50 60
4.5
43 51
6.0
91 275
33 55
26 47
345 415 ns 2.0 Fig.9
69 83
4.5
59 71
6.0
80 240
29 48
23 41
300 360 ns 2.0 Fig.9
60 72
4.5
51 61
6.0
102 315
37 63
30 54
395 475 ns 2.0 Fig.12
79 95
4.5
67 81
6.0
96 285
35 57
28 48
355 430 ns 2.0 Fig.12
71 86
4.5
60 73
6.0
83 290
30 58
24 49
365 435 ns 2.0 Fig.12
73 87
4.5
62 74
6.0
19 75
7 15
6 13
95 110 ns 2.0 Fig.10
19 22
4.5
16 19
6.0
December 1990
7
7페이지 | |||
구 성 | 총 13 페이지수 | ||
다운로드 | [ 74HCT192.PDF 데이터시트 ] |
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부품번호 | 상세설명 및 기능 | 제조사 |
74HCT190 | Presettable synchronous BCD decade up/down counter | Philips |
74HCT191 | Presettable synchronous 4-bit binary up/down counter | Philips |
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