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PDF 74LCX2244MSA Data sheet ( Hoja de datos )
| Número de pieza | 74LCX2244MSA | |
| Descripción | Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs with 26W Series Resistors in the Outputs | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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October 1995
Revised June 1999
74LCX2244
Low Voltage Buffer/Line Driver with 5V Tolerant Inputs
and Outputs with 26Ω Series Resistors in the Outputs
General Description
The LCX2244 contains eight non-inverting buffers with 3-
STATE outputs. The device may be employed as a mem-
ory address driver, clock driver and bus-oriented transmit-
ter/receiver. The LCX2244 is designed for low voltage
(2.5V or 3.3V) VCC applications with capability of interfac-
ing to a 5V signal environment. The 26Ω-series resistors
help reduce output overshoot and undershoot.
The LCX2244 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V VCC specifications provided
s 7.5 ns tPD max (VCC = 3.3V) 10 µA ICC max
s Power down high impedance inputs and outputs
s 26Ω-series resistors in the outputs
s Supports live insertion/withdrawal (Note 1)
s ±12 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number Package Number
Package Description
74LCX2244WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74LCX2244SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX2244MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LCX2244MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
© 1999 Fairchild Semiconductor Corporation DS012569
www.fairchildsemi.com
1 page  
AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)
Test
tPLH, tPHL
tPZL, tPLZ
tPZH,tPHZ
Switch
Open
6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output High Enable and
Disable Times for Logic
Propagation Delay. Pulse Width and trec Waveforms
Setup Time, Hold Time and Recovery Time for Logic
3-STATE Output Low Enable and
Disable Times for Logic
trise and tfall
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tR = tF = 3ns)
Symbol
Vmi
Vmo
Vx
Vy
3.3V ± 0.3V
1.5V
1.5V
VOL + 0.3V
VOH − 0.3V
VCC
2.7V
1.5V
1.5V
VOL + 0.3V
VOH − 0.3V
2.5V ± 0.2V
VCC/2
VCC/2
VOL + 0.15V
VOH − 0.15V
5 www.fairchildsemi.com
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| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet 74LCX2244MSA.PDF ] | |
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