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PDF 74LCX32652 Data sheet ( Hoja de datos )
| Número de pieza | 74LCX32652 | |
| Descripción | Low Voltage Transceiver/Register with 5V Tolerant Inputs and Outputs (Preliminary) | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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Preliminary
August 2001
Revised August 2001
74LCX32652
Low Voltage Transceiver/Register
with 5V Tolerant Inputs and Outputs (Preliminary)
General Description
The LCX32652 contains thirty-two non-inverting bidirec-
tional bus transceivers with 3-STATE outputs providing
multiplexed transmission of data directly from the input bus
or from the internal registers. Data on the A or B bus will be
clocked into the registers as the appropriate clock pin goes
to the HIGH logic level. Each byte has separate control
inputs which can be shorted together for full 32-bit opera-
tion. Output Enable pins (OEABn, OEBAn) are provided to
control the transceiver function (see Functional Descrip-
tion).
The LCX32652 is designed for low-voltage (2.5V or 3.3V)
VCC applications with capability of interfacing to a 5V signal
environment.
The LCX32652 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V VCC specifications provided
s 5.7 ns tPD max (VCC = 3.3V), 20 µA ICC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s ±24 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
s Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
(Preliminary)
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC and OE tied to GND through a resistor: the minimum
value or the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number Package Number
Package Description
74LCX32652GX
(Note 2)
BGA114A
114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
(Preliminary) [TAPE and REEL]
Note 2: BGA package available in Tape and Reel only.
© 2001 Fairchild Semiconductor Corporation DS500634
www.fairchildsemi.com
1 page  
Logic Diagrams
Preliminary
Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
5 www.fairchildsemi.com
5 Page 
Physical Dimensions inches (millimeters) unless otherwise noted
Preliminary
114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Package Number BGA114A
Preliminary
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
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