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PDF 74LCX38 Data sheet ( Hoja de datos )
| Número de pieza | 74LCX38 | |
| Descripción | Low Voltage Quad 2-Input NAND Gate (Open Drain) with 5V Tolerant Inputs | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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October 1995
Revised June 1999
74LCX38
Low Voltage Quad 2-Input NAND Gate (Open Drain)
with 5V Tolerant Inputs
General Description
The LCX38 contains four 2-input open drain NAND gates.
The inputs tolerate voltages up to 7V allowing the interface
of 5V systems to 3V systems.
The 74LCX38 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs
s 2.3V–3.6V VCC specifications provided
s 6.5 ns tPD max (VCC = 3.3V), 10 µA ICC max
s Power down high impedance inputs and outputs
s ±24 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 150V
Ordering Code:
Order Number Package Number
Package Description
74LCX38M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
74LCX38SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX38MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn
On
Description
Inputs
Outputs
© 1999 Fairchild Semiconductor Corporation DS012574
www.fairchildsemi.com
1 page  
Schematic Diagram
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet 74LCX38.PDF ] | |
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