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부품번호 | 74LCX543 기능 |
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기능 | Low Voltage Octal Registered Transceiver with 5V Tolerant Inputs and Outputs | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 8 페이지수
May 1995
Revised April 1999
74LCX543
Low Voltage Octal Registered Transceiver with
5V Tolerant Inputs and Outputs
General Description
The LCX543 is a non-inverting octal transceiver containing
two sets of D-type registers for temporary storage of data
flowing in either direction. Separate Latch Enable and Out-
put Enable inputs are provided for each register to permit
independent input and output control in either direction of
data flow.
The LCX543 is designed for low voltage (2.5V or 3.3V) VCC
applications with capability of interfacing to a 5V signal
environment.
The LCX543 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V − 3.6V VCC specifications provided
s 7.0 ns tPD max (VCC = 3.3V), 10 µA ICC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s ±24 mA Output Drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX543WM
74LCX543MSA
74LCX543MTC
Package Number
Package Description
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
MSA24
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
Description
OEAB A-to-B Output Enable Input (Active LOW)
OEBA B-to-A Output Enable Input (Active LOW)
CEAB
A-to-B Enable Input (Active LOW)
CEBA
B-to-A Enable Input (Active LOW)
LEAB
A-to-B Latch Enable Input (Active LOW)
LEBA
B-to-A Latch Enable Input (Active LOW)
A0–A7
A-to-B Data Inputs or
B-to-A 3-STATE Outputs
B0–B7
B-to-A Data Inputs or
A-to-B 3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation DS012463.prf
www.fairchildsemi.com
DC Electrical Characteristics (Continued)
Symbol
Parameter
ICC Quiescent Supply Current
∆ICC
Increase in ICC per Input
Note 5: Outputs disabled or 3-STATE only.
Conditions
VI = VCC or GND
3.6V ≤ VI, VO ≤ 5.5V (Note 5)
VIH = VCC −0.6V
VCC
(V)
2.3 − 3.6
2.3 − 3.6
2.3 − 3.6
TA = −40°C to +85°C
Min Max
10
±10
500
Units
µA
µA
AC Electrical Characteristics
TA = −40°C to +85°C, RL = 500Ω
Symbol
Parameter
VCC = 3.3V ± 0.3V
CL = 50 pF
VCC = 2.7V
CL = 50 pF
VCC = 2.5V ± 0.2V
CL = 30 pF
Units
Min Max Min Max Min Max
tPHL
tPLH
tPHL
tPLH
tPZL
tPZH
Propagation Delay
An to Bn or Bn to An
Propagation Delay
LEBA to An or LEAB to Bn
Output Enable Time
OEBA or OEAB to An or Bn
1.5 7.0 1.5 8.0 1.5 8.4
ns
1.5 7.0 1.5 8.0 1.5 8.4
1.5 8.5 1.5 9.5 1.5 10.5
ns
1.5 8.5 1.5 9.5 1.5 10.5
1.5 9.0 1.5 10.0 1.5 11.0
1.5 9.0 1.5 10.0 1.5 11.0 ns
tPLZ
tPHZ
CEBA or CEAB to An or Bn
Output Disable Time
OEBA or OEAB to An or Bn
1.5 7.0 1.5
1.5 7.0 1.5
7.5 1.5 8.4
7.5 1.5 8.4
ns
CEBA or CEAB to An or Bn
tS
Setup Time, HIGH or LOW Data to LEXX
2.5
2.5
4.0
ns
tH
Hold Time, HIGH or LOW Data to LEXX
1.5
1.5
2.0
ns
tW Pulse Width, Latch Enable, LOW
3.3
3.3
3.3
ns
tOSHL
tOSLH
Output to Output Skew
(Note 6)
1.0
1.0
ns
Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Dynamic Switching Characteristics
Symbol
Parameter
VOLP
Quiet Output Dynamic Peak VOL
VOLV
Quiet Output Dynamic Valley VOL
Capacitance
Conditions
CL = 50 pF, VIH = 3.3V, VIL = 0V
CL = 30 pF, VIH = 2.5V, VIL = 0V
CL = 50 pF, VIH = 3.3V, VIL = 0V
CL = 30 pF, VIH = 2.5V, VIL = 0V
VCC
(V)
TA = 25°C
Typical
Units
3.3 0.8
2.5 0.6
V
3.3 −0.8
2.5 −0.6
V
Symbol
CIN
CI/O
CPD
Parameter
Input Capacitance
Input/Output Capacitance
Power Dissipation Capacitance
Conditions
VCC = Open, VI = 0V or VCC
VCC = 3.3V, VI = 0V or VCC
VCC = 3.3V, VI = 0V or VCC, f = 10 MHz
Typical
7
8
25
Units
pF
pF
pF
www.fairchildsemi.com
4
4페이지 Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
Package Number M24B
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
Package Number MSA24
7 www.fairchildsemi.com
7페이지 | |||
구 성 | 총 8 페이지수 | ||
다운로드 | [ 74LCX543.PDF 데이터시트 ] |
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부품번호 | 상세설명 및 기능 | 제조사 |
74LCX540 | Low Voltage Octal Buffer/Line Driver | Fairchild Semiconductor |
74LCX541 | Low Voltage Octal Buffer/Line Driver | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |