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74LCX652 데이터시트 PDF




Fairchild Semiconductor에서 제조한 전자 부품 74LCX652은 전자 산업 및 응용 분야에서
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부품번호 74LCX652 기능
기능 Low Voltage Transceiver/Register with 5V Tolerant Inputs and Outputs
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74LCX652 데이터시트, 핀배열, 회로
February 1994
Revised April 1999
74LCX652
Low Voltage Transceiver/Register with 5V Tolerant
Inputs and Outputs
General Description
The LCX652 consists of bus transceiver circuits with D-
type flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the input bus or from
internal registers. Data on the A or B bus will be clocked
into the registers as the appropriate clock pin goes to the
HIGH logic level. Output Enable pins (OEAB, OEBA) are
provided to control the transceiver function.
The LCX652 is designed for low voltage (2.5V or 3.3V) VCC
applications with capability of interfacing to a 5V signal
environment.
The LCX652 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V 3.6V VCC specifications provided
s 7.0 ns tPD max (VCC = 3.3V), 10 µA ICC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s ±24 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX652WM
74LCX652MSA
74LCX652MTC
Package Number
Package Description
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
MSA24
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
A0–A7, B0–B7
CPAB, CPBA
SAB, SBA
OEAB, OEBA
Description
A and B Inputs/3-STATE Outputs
Clock Inputs
Select Inputs
Output Enable Inputs
© 1999 Fairchild Semiconductor Corporation DS011998.prf
www.fairchildsemi.com




74LCX652 pdf, 반도체, 판매, 대치품
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
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74LCX652 전자부품, 판매, 대치품
AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)
Test
tPLH, tPHL
tPZL, tPLZ
tPZH,tPHZ
Switch
Open
6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output High Enable and
Disable Times for Logic
Propagation Delay. Pulse Width and trec Waveforms
Setup Time, Hold Time and Recovery Time for Logic
3-STATE Output Low Enable and
Disable Times for Logic
trise and tfall
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tR = tF = 3ns)
Symbol
Vmi
Vmo
Vx
Vy
3.3V ± 0.3V
1.5V
1.5V
VOL + 0.3V
VOH 0.3V
VCC
2.7V
1.5V
1.5V
VOL + 0.3V
VOH 0.3V
2.5V ± 0.2V
VCC/2
VCC/2
VOL + 0.15V
VOH 0.15V
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관련 데이터시트

부품번호상세설명 및 기능제조사
74LCX652

Low Voltage Transceiver/Register with 5V Tolerant Inputs and Outputs

Fairchild Semiconductor
Fairchild Semiconductor
74LCX652MSA

Low Voltage Transceiver/Register with 5V Tolerant Inputs and Outputs

Fairchild Semiconductor
Fairchild Semiconductor

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