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PDF 74LCXZ16245 Data sheet ( Hoja de datos )

Número de pieza 74LCXZ16245
Descripción Low Voltage 16-Bit Bidirectional Transceiver with 5V Tolerant Inputs and Outputs
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! 74LCXZ16245 Hoja de datos, Descripción, Manual

March 2002
Revised March 2002
74LCXZ16245
Low Voltage 16-Bit Bidirectional Transceiver
with 5V Tolerant Inputs and Outputs
General Description
The LCXZ16245 contains sixteen non-inverting bidirec-
tional buffers with 3-STATE outputs and is intended for bus
oriented applications. The device is designed for low volt-
age (2.7V or 3.3V) VCC applications with capability of inter-
facing to a 5V signal environment. The device is byte
controlled. Each byte has separate control inputs which
could be shorted together for full 16-bit operation. The T/R
inputs determine the direction of data flow through the
device. The OE inputs disable both the A and B ports by
placing them in a high impedance state.
When VCC is between 0V and 1.5V, the LCXZ16245 is on
the high impedance state during power-up or power-down.
This places the outputs in the high impedance (Z) state
preventing intermittent low impedance loading or glitching
in bus oriented applications.
The LCXZ16245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.7V–3.6V VCC specifications provided
s 4.5 ns tPD max (VCC = 3.3V), 20 µA ICC max
s Power-down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s ±24 mA output drive (VCC = 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance conforms to the requirements of
JESD78
s ESD performance:
Human body model > 2000V
Machine model > 200V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number Package Number
Package Description
74LCXZ16245GX
(Note 2)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
(Preliminary) [TAPE and REEL]
74LCXZ16245MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.
Note 2: BGA package available in Tape and Reel only.
Logic Symbol
© 2002 Fairchild Semiconductor Corporation DS500580
www.fairchildsemi.com

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74LCXZ16245 pdf
AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)
Test
tPLH, tPHL
tPZL, tPLZ
tPZH, tPHZ
Switch
Open
6V at VCC = 3.3 ± 0.3V, and 2.7V
GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output High Enable and
Disable Times for Logic
Propagation Delay. Pulse Width and trec Waveforms
Setup Time, Hold Time and Recovery Time for Logic
3-STATE Output Low Enable and
Disable Times for Logic
trise and tfall
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tr = tf = 3ns)
Symbol
Vmi
Vmo
Vx
Vy
VCC
3.3V ± 0.3V
2.7V
1.5V
1.5V
1.5V
1.5V
VOL + 0.3V
VOH 0.3V
VOL + 0.3V
VOH 0.3V
5 www.fairchildsemi.com

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