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부품번호 | 74LVC10D 기능 |
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기능 | Triple 3-input NAND gate | ||
제조업체 | Philips | ||
로고 | |||
전체 8 페이지수
INTEGRATED CIRCUITS
74LVC10
Triple 3-input NAND gate
Product specification
Replaces data sheet of 1996 Feb
IC24 Data Handbook
Philips
Semiconductors
1997 Apr 28
Philips Semiconductors
Triple 3-input NAND gate
Product specification
74LVC10
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
SYMBOL
PARAMETER
TEST CONDITIONS
VIH HIGH level Input voltage
VCC = 1.2V
VCC = 2.7 to 3.6V
VIL LOW level Input voltage
VCC = 1.2V
VCC = 2.7 to 3.6V
VCC = 2.7V; VI = VIH or VIL; IO = –12mA
VOH HIGH level output voltage
VCC = 3.0V; VI = VIH or VIL; IO = –100µA
VCC = 3.0V; VI = VIH or VIL; IO = –12mA
VCC = 3.0V; VI = VIH or VIL; IO = –24mA
VCC = 2.7V; VI = VIH or VIL; IO = 12mA
VOL LOW level output voltage
VCC = 3.0V; VI = VIH or VIL; IO = 100µA
VCC = 3.0V; VI = VIH or VIL; IO = 24mA
II Input leakage current
VCC = 3.6V; VI = 5.5V or GND Not for I/O pins
IIHZ/IILZ Input current for common I/O pins
VCC = 3.6V; VI = VCC or GND
IOZ 3-State output OFF-state current
VCC = 3.6V; VI = VIH or VIL; VO = VCC or GND
ICC Quiescent supply current
VCC = 3.6V; VI = VCC or GND; IO = 0
∆ICC
Additional quiescent supply current per
input pin
VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0
NOTE:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
LIMITS
Temp = -40°C to +85°C
MIN TYP1 MAX
VCC
2.0
GND
0.8
VCC*0.5
VCC*0.2
VCC*0.6
VCC*1.0
VCC
0.40
0.20
0.55
"0.1 "5
"0.1 "15
0.1 "10
0.1 20
5 500
UNIT
V
V
V
V
µA
µA
µA
µA
µA
AC CHARACTERISTICS
GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF
SYMBOL
PARAMETER
WAVEFORM
tPHL/
tPLH
Propagation delay
nA, nB, nC to nY
Figures 1, 2
NOTE:
1. These typical values are at VCC = 3.3V and Tamb = 25°C.
LIMITS
VCC = 3.3V ±0.3V
MIN TYP1 MAX
VCC = 2.7V
MIN MAX
– 3.9 6.4 – 7.5
VCC = 1.2V
TYP
–
UNIT
ns
AC WAVEFORMS
VM = 1.5 V at VCC w 2.7 V
VM = 0.5 S VCC at VCC < 2.7 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VI
nA, nB, nC
INPUT
GND
VOH
nY OUTPUT
VOL
VM
t PHL
VM
t PLH
SV00420
Figure 1. Input (nA, nB, nC) to output (nY)
propagation delays.
TEST CIRCUIT
PULSE
GENERATOR
VI
VCC
D.U.T.
RT
VO
CL 50pF
S1
500Ω
2 < VCC
Open
GND
500Ω
VCC
t 2.7V
2.7V – 3.6V
VI
VCC
2.7V
Test
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
2 < VCC
GND
SY00003
Figure 2. Load circuitry for switching times.
1997 Apr 28
4
4페이지 Philips Semiconductors
Triple 3-input NAND gate
Product specification
74LVC10
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
1997 Apr 28
7
7페이지 | |||
구 성 | 총 8 페이지수 | ||
다운로드 | [ 74LVC10D.PDF 데이터시트 ] |
당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는 |
구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
74LVC10 | Triple 3-input NAND gate | Philips |
74LVC109 | Dual JK flip-flop with set and reset; positive-edge trigger | Philips |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |