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PDF TDA1313T Data sheet ( Hoja de datos )
| Número de pieza | TDA1313T | |
| Descripción | Stereo continuous calibration DAC CC-DAC | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
DATA SHEET
TDA1313; TDA1313T
Stereo continuous calibration DAC
(CC-DAC)
Objective specification
File under Integrated Circuits, IC01
July 1993
1 page  
Philips Semiconductors
Stereo continuous calibration DAC
(CC-DAC)
Objective specification
TDA1313; TDA1313T
PINNING
SYMBOL
LRSEL/RSI
SI/LSI
4/8FSSEL
VREF
VSSO
VDDO
RIN
ROUT
LOUT
LIN
VDDA
VSSA
VSSD
VDDD
WS
BCK
PIN DESCRIPTION
1 left/right select; right serial
input
2 serial input; left serial input
3 4/8 oversampling select
4 reference voltage output
5 operational amplifier ground
6 operational amplifier supply
voltage
7 right analog input
8 right analog output
9 left analog output
10 left analog input
11 analog supply voltage
12 analog ground
13 digital ground
14 digital supply voltage
15 word select
16 bit clock input
handbook, halfpage
LRSEL/RSI 1
16 BCK
SI/LSI 2
15 WS
4/8FSSEL 3
14 VDDD
VREF 4 TDA1313 13 VSSD
VSSO 5 TDA1313T 12 VSSA
VDDO 6
11 VDDA
RIN 7
10 LIN
ROUT 8
9 LOUT
MGE229
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
The basic operation of the continuous calibration DAC is
illustrated in Fig.3. The figure shows the calibration and
operation cycle. During calibration of the MOS current
source (Fig.3a) transistor M1 is connected as a diode by
applying a reference current. The voltage Vgs on the
intrinsic gate-source capacitance Cgs of M1 is then
determined by the transistor characteristics. After
calibration of the drain current to the reference value IREF,
the switch S1 is opened and S2 is switched to the other
position (Fig.3b). The gate-to-source voltage Vgs of M1 is
not changed because the charge on Cgs is preserved.
Therefore, the drain current of M1 will still be equal to IREF
and this exact duplicate of IREF is now available at the IO
terminal.
In the TDA1313; 1313T, 32 current sources and one spare
current source are continuously calibrated (see Fig.1).
The spare current source is included to allow continuous
converter operation. The output of one calibrated source is
connected to an 11-bit binary current devider which
consists of 2048 transistors. A symmetrical offset
decoding principle is incorporated and arranges the bit
switching in such a way that the zero-crossing is
performed by switching only the LSB currents.
The TDA1313; T (CC-DAC) accepts serial input data
format of 16 bit word length. The most significant bit (bit 1)
must always be first. The timing is illustrated in Fig.4 and
the input data formats are illustrated in Figs 5 and 6.
Data is placed in the right and left input registers (Fig.1).
The data in the input registers is simultaneously latched to
the output registers which control the bit switches.
VREF and VFS are proportional to VDD.
Where: VDD1/VDD2 = VFS1/V = VREF1/VREF2
July 1993
5
5 Page 
Philips Semiconductors
Stereo continuous calibration DAC
(CC-DAC)
APPLICATION INFORMATION
Objective specification
TDA1313; TDA1313T
handbook, full pagewidth
10
7
1 nF
1 nF
VOUTL
200
pF
3
kΩ
98
TDA1313T
VOUTR
3
16
1
4 3 200
22 kΩ
pF
2 µF
15
13 14 5 6 12 11
100 nF
VDDD
100 nF
VDDO
100 nF
VDDA
MGE232
Fig.7 TDA1313T as line driver with 3 kΩ/200 pF load.
handbook, full pagewidth
10
7
8.2 2
kΩ nF
2 8.2
nF kΩ
VOUTL
100 µF
32 Ω
9 8 VOUTR
TDA1313T
100 µF
3
16
4 32 Ω
1 22 µF
2
15
13 14 5 6 12 11
100 nF
VDDD
100 nF
VDDO
100 nF
VDDA
MGE233
July 1993
Fig.8 TDA1313T as headphone driver with 32 Ω load.
11
11 Page | ||
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| PDF Descargar | [ Datasheet TDA1313T.PDF ] | |
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