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Número de pieza | EL2142C | |
Descripción | Differential Line Receiver | |
Fabricantes | Elantec | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de EL2142C (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
No Preview Available ! EL2142C
Differential Line Receiver
Features
Differential input range g2 3V
150 MHz 3 dB bandwidth
400 V ms slewrate
g5V supplies or single supply
50 mA minimum output current
Output swing (100X load) to
within 1 5V of supplies
Low power b11 mA typical
Applications
Twisted pair receiver
Differential line receiver
VGA over twisted pair
ADSL HDSL receiver
Differential to single ended
amplification
Reception of analog signals in a
noisy environment
Ordering Information
Part No Temp Range Package Outline
EL2142CN b40 C to a85 C 8-pin DIP MDP0031
EL2142CS b40 C to a85 C 8-pin SOIC MDP0027
General Description
The EL2142C is a very high bandwidth amplifier designed to
extract the difference signal from noisy environments and is
thus primarily targeted for applications such as receiving sig-
nals from twisted pair lines or any application where common
mode noise injection is likely to occur
The EL2142C is stable for a gain of one and requires two exter-
nal resistors to set the voltage gain
The output common mode level is set by the reference pin
(VREF) which has a b3 dB bandwidth of over 100 MHz Gen-
erally this pin is grounded but it can be tied to any voltage
reference
The output can deliver a minimum of g50 mA and is short
circuit protected to withstand a temporary overload condition
Connection Diagrams
EL2142C SO P-DIP
2142-1
Note All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication however this data sheet cannot be a ‘‘controlled document’’ Current revisions if any to these
specifications are maintained at the factory and are available upon your request We recommend checking the revision level before finalization of your design documentation
1996 Elantec Inc
1 page Applications Information
EL2142C
Differential Line Receiver
2142-8
Gain Equation
VOUT e ((R2aR1) R1) c (VIN-VINBaVREF) when R1 tied to GND
VOUT e ((R2aR1) R1) c (VIN-VINB) when R1 tied to VREF
Choice of Feedback Resistor
For a gain of one VOUT may be shorted back to
VFB but 100X – 200X improves the bandwidth
For gains greater than one there is little to be
gained from choosing resistor R1 value below
200X for it would only result in increased power
dissipation and potential signal distortion Above
200X the bandwidth response will develop some
peaking (for a gain of one) but substantially
higher R1 values may be used for higher voltage
gains such as up to 1 kX at a gain of four before
peaking will develop
Capacitance Considerations
As with many high bandwidth amplifiers the
EL2142C prefers not to drive highly capacitive
loads It is best if the capacitance on VOUT is
kept below 10 pF if the user does not want gain
peaking to develop The VFB node forms a poten-
tial pole in the feedback loop so capacitance
should be minimized on this node for maximum
bandwidth
The amount of capacitance tolerated on any of
these nodes in an actual application will also be
dependent on the gain setting and the resistor
values in the feedback network
5
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet EL2142C.PDF ] |
Número de pieza | Descripción | Fabricantes |
EL2142C | Differential Line Receiver | Elantec |
EL2142CN | Differential Line Receiver | Elantec |
EL2142CS | Differential Line Receiver | Elantec |
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