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K9K4G08Q0M 데이터시트 PDF




Samsung에서 제조한 전자 부품 K9K4G08Q0M은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 K9K4G08Q0M 자료 제공

부품번호 K9K4G08Q0M 기능
기능 512M x 8 Bit / 256M x 16 Bit NAND Flash Memory
제조업체 Samsung
로고 Samsung 로고


K9K4G08Q0M 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.



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K9K4G08Q0M 데이터시트, 핀배열, 회로
K9W8G08U1M
K9K4G08Q0M K9K4G16Q0M
K9K4G08U0M K9K4G16U0M
FLASH MEMORY
Document Title
512M x 8 Bit / 256M x 16 Bit NAND Flash Memory
Revision History
Revision No History
0.0 1. Initial issue
0.1 1. Add two-K9K4GXXU0M-YCB0/YIB0 Stacked Package
0.2 1. The 3rd Byte ID after 90h ID read command is don’t cared.
The 5th Byte ID after 90h ID read command is deleted.
0.3 1. The K9W8G16U1M-YCB0,YIB0,PCB0,PIB0 is deleted in line up.
2. Note is added.
(VIL can undershoot to -0.4V and VIH can overshoot to VCC +0.4V for
durations of 20 ns or less.)
3. Pb-free Package is added.
K9K4G08Q0M-PCB0,PIB0
K9K4G08U0M-PCB0,PIB0
K9K4G16U0M-PCB0,PIB0
K9K4G16Q0M-PCB0,PIB0
K9W8G08U1M-PCB0,PIB0
0.4 1. Added Addressing method for program operation.
0.5 1. The tADL(Address to Data Loading Time) is added.
- tADL Minimum 100ns
- tADL is the time from the WE rising edge of final address cycle
to the WE rising edge of first data cycle at program operation.
2. Added addressing method for program operation
3. PKG(TSOP1) Dimension Change
Draft Date Remark
Feb. 19. 2003 Advance
Mar. 31. 2003 Preliminary
Apr. 9. 2003 Preliminary
Apr. 30. 2003 Preliminary
Jan. 27. 2004 Preliminary
May.31. 2004
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the
right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you
have any questions, please contact the SAMSUNG branch office near your office.
1




K9K4G08Q0M pdf, 반도체, 판매, 대치품
K9W8G08U1M
K9K4G08Q0M K9K4G16Q0M
K9K4G08U0M K9K4G16U0M
FLASH MEMORY
PIN CONFIGURATION (TSOP1)
K9W8G08U1M-YCB0,PCB0/YIB0,PIB0
N.C
N.C
N.C
N.C
N.C
R/B2
R/B1
RE
CE1
CE2
N.C
Vcc
Vss
N.C
N.C
CLE
ALE
WE
WP
N.C
N.C
N.C
N.C
N.C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48-pin TSOP1
Standard Type
12mm x 20mm
48 N.C
47 N.C
46 N.C
45 N.C
44 I/O7
43 I/O6
42 I/O5
41 I/O4
40 N.C
39 N.C
38 PRE
37 Vcc
36 Vss
35 N.C
34 N.C
33 N.C
32 I/O3
31 I/O2
30 I/O1
29 I/O0
28 N.C
27 N.C
26 N.C
25 N.C
PACKAGE DIMENSIONS
48-PIN LEAD/LEAD FREE PLASTIC THIN SMALL OUT-LINE PACKAGE TYPE(I)
48 - TSOP1 - 1220AF
Unit :mm/Inch
20.00±0.20
0.787±0.008
#1 #48
#24
0~8°
0.45~0.75
0.018~0.030
18.40±0.10
0.724±0.004
#25
1.00±0.05
0.039±0.002
01..02407MAX
0.02
0.002
MIN
(
0.50
0.020
)
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K9K4G08Q0M 전자부품, 판매, 대치품
K9W8G08U1M
K9K4G08Q0M K9K4G16Q0M
K9K4G08U0M K9K4G16U0M
FLASH MEMORY
Figure 1-2. K9XXG16XXM (X16) Functional Block Diagram
VCC
VSS
A11 - A28
X-Buffers
Latches
& Decoders
4096M + 128M Bit
NAND Flash
ARRAY
A0 - A10
Y-Buffers
Latches
& Decoders
Command
Command
Register
(1024 + 32)Word x 262144
Data Register & S/A
Cache Register
Y-Gating
I/O Buffers & Latches
CE Control Logic
RE & High Voltage
WE Generator
Global Buffers
Output
Driver
CLE ALE PRE WP
VCC
VSS
I/0 0
I/0 15
Figure 2-2. K9XXG16XXM (X16) Array Organization
1 Block = 64 Pages
(64K + 2k) Word
256K Pages
(=4,096 Blocks)
1K Words
32 Words
1 Page = (1K + 32)Words
1 Block = (1K + 32)Word x 64 Pages
= (64K + 2K) Words
1 Device = (1K+32)Word x 64Pages x 4096 Blocks
= 4224 Mbits
16 bit
Page Register
1K Words
I/O 0 ~ I/O 15
32 Words
I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6
1st Cycle
A0
A1
A2
A3
A4
A5
A6
2nd Cycle A8 A9 A10 *L *L *L *L
3rd Cycle A11 A12 A13 A14 A15 A16 A17
4th Cycle A19 A20 A21 A22 A23 A24 A25
5th Cycle A27
A28
*L
*L
*L
*L
*L
NOTE : Column Address : Starting Address of the Register.
* L must be set to "Low".
* The device ignores any additional input of address cycles than reguired.
I/O 7
A7
*L
A18
A26
*L
I/O8 ~ 15
*L
*L
*L
*L
*L
Column Address
Column Address
Row Address
Row Address
Row Address
7

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관련 데이터시트

부품번호상세설명 및 기능제조사
K9K4G08Q0M

512M x 8 Bit / 256M x 16 Bit NAND Flash Memory

Samsung
Samsung

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