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PDF LMC8101 Data sheet ( Hoja de datos )

Número de pieza LMC8101
Descripción Rail-to-Rail Input and Output / 2.7V Op Amp in micro SMD package with Shutdown
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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No Preview Available ! LMC8101 Hoja de datos, Descripción, Manual

September 1999
LMC8101
Rail-to-Rail Input and Output, 2.7V Op Amp in
micro SMD package with Shutdown
General Description
The LMC8101 is a Rail-to-Rail Input and Output high perfor-
mance CMOS operational amplifier. The LMC8101 is ideal
for low voltage (2.7V to 10V) applications requiring
Rail-to-Rail inputs and output. The LMC8101 is supplied in
the die sized micro SMD as well as the 8 pin MSOP pack-
ages. The micro SMD package requires 75% less board
space as compared to the SOT23-5 package. The LMC8101
is an upgrade to the industry standard LMC7101.
The LMC8101 incorporates a simple user controlled method-
ology for shutdown. This allows ease of use while reducing
the total supply current to 1nA typical. This extends battery
life where power saving is mandated. The shutdown input
threshold can be set relative to either V+ or Vusing the SL
pin (see Application Note section for details).
Other enhancements include improved offset voltage limit,
three times the output current drive and lower 1/f noise when
compared to the industry standard LMC7101 Op Amp. This
makes the LMC8101 ideal for use in many battery powered,
wireless communication and Industrial applications.
Features
VS = 2.7V, TA = 25˚C, RL to V+/2, Typical values unless
specified.
n Rail-to-Rail Inputs
n Rail-to-Rail Output
Swing
Within 35mV of Supplies (RL =2k)
n Packages Offered:
n micro SMD package
1.39mm x 1.41mm
n MSOP package
n Low Supply Current
3.0mm x 4.9mm
<1mA (max)
n Shutdown Current
1µA (max)
n Versatile Shutdown feature
10µs turn-on
n Output Short Circuit Current
10mA
n Offset Voltage
±5 mV (max)
n Gain-Bandwidth
1MHz
n Supply Voltage Range
2.7V-10V
n THD
0.18%
n Voltage Noise
36
Applications
n Portable Communication (voice, data)
n Cellular Phone Power Amp Control Loop
n Buffer AMP
n Active Filters
n Battery Sense
n VCO Loop
Connection Diagrams
8-Pin MSOP
micro SMD
Top View
DS101240-79
© 1999 National Semiconductor Corporation DS101240
Top View
DS101240-80
www.national.com

1 page




LMC8101 pdf
+/−5V Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ =5V, V= −5V, VCM = VO = 0V, and RL > 1 Mto gnd.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
PSRR
Power Supply Rejection Ratio
VS = 5V to 10V
CMVR
Input Common-Mode Voltage Range CMRR 50 dB
AVOL
Large Signal Voltage Gain
VO Output Swing
High
Output Swing
Low
ISC Output Short Circuit Current
IS Supply Current
Ton
Toff
Iin
SR
fu
GBW
en
Shutdown Turn-on time
Shutdown Turn-off time
SLand SDInput Current
Slew Rate
(Note 8)
Unity Gain-Bandwidth
Gain Bandwidth Product
Input-Referred Voltage Noise
Sourcing
RL = 600
VO = 0V to 4V
Sinking
RL = 600
VO = 0V to −4V
Sourcing
RL = 2k
VO = 0V to 4.6V
Sinking
RL = 2k
VO = 0V to −4.6V
RL = 600
VID = 100mV
RL = 2k
VID = 100mV
RL = 600
VID = −100mV
RL = 2k
VID = −100mV
Sourcing, VID = 100mV
(Note 3),(Note 11)
Sinking, VID = −100mV
(Note 3),(Note 11)
No load, normal operation
Shutdown mode
(Note 9)
(Note 9)
AV = +10, RL = 10k,
VO = 10Vpp, CL = 1000pF
VI = 10mV
RL = 2k
f = 10KHz
f = 10KHz, Rs = 50
Typ
(Note 5)
80
−5.3
5.3
34.5
34.5
138
138
4.73
4.90
−4.85
−4.95
49
90
1.1
0.001
10
1
±1
1.2
840
1.3
33
Limit
(Note 6)
76
72
−5.2
−5.0
5.2
5.0
17.8
10
17.8
3.16
31.6
17.8
31.6
10
4.60
4.54
4.85
4.83
−4.75
−4.65
4.90
−4.84
30
25
60
52
1.7
1.9
1
15
±64
Units
dB
min
V
max
V
min
V/mV
min
V/mV
min
V
min
V
min
V
max
V
max
mA
min
mA
min
mA
max
µA
µs
µs
pA
max
V/µs
KHz
MHz
in Input-Referred Current Noise f = 10KHz
1.5
THD
Total Harmonic Distortion
f = 10KHz, AV = +1,
VO =8Vpp, RL = 600
0.2
%
5 www.national.com

5 Page





LMC8101 arduino
Typical Performance Characteristics VS = 2.7V, Single Supply, VCM = V+/2, TA = 25˚C unless
specified (Continued)
Undistorted Output Voltage Swing
vs.Output Load Resistance
Step Response 1% settling time
and % overshoot vs.Cap Load
Large Signal Step Response
DS101240-46
Small Signal Step Response
DS101240-14
DS101240-15
Large Signal Step Response
Small Signal Step Response
DS101240-16
Small Signal Step Response
DS101240-17
Large Signal Step Response
DS101240-18
Large Signal Step Response
DS101240-19
DS101240-20
DS101240-21
11 www.national.com

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