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부품번호 PEB20321 기능
기능 Multichannel Network Interface Controller for HDLC MUNICH32X
제조업체 Siemens Semiconductor Group
로고 Siemens Semiconductor Group 로고


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PEB20321 데이터시트, 핀배열, 회로
www.DataSheet4U.com
ICs for Communications
Multichannel Network Interface Controller for HDLC
MUNICH32X
PEB 20321 Version 2.2
Data Sheet 1998-08-01
DS 1




PEB20321 pdf, 반도체, 판매, 대치품
PEB 20321
Table of Contents
Page
6.3.1
6.3.2
6.3.3
6.3.4
6.4
6.5
6.6
DMSM Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .149
Data Transfer in Interrupt Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .149
Data Transfer in DMA Assisted Mode . . . . . . . . . . . . . . . . . . . . . . . . . . .151
DMSM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .152
Peripheral Device Register Read/Write Operation . . . . . . . . . . . . . . . . .153
Connection to Common Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . .153
LBI DMA Controller (DMAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .155
7
7.1
7.2
7.2.1
7.2.2
7.3
7.4
7.5
Synchronous Serial Control (SSC) Interface . . . . . . . . . . . . . . . . . . . .157
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157
Operational Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .160
Full-Duplex Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .160
Half Duplex Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .163
Baud Rate Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .166
Error Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .166
SSC Interrupt Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .168
8
8.1
8.1.1
8.1.2
8.1.3
8.1.4
8.2
8.2.1
8.2.2
8.2.3
8.3
8.3.1
8.3.2
IOM®-2 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .170
General Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .171
B-Channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .172
D-Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .172
Monitor Channel (including MX, MR bits) . . . . . . . . . . . . . . . . . . . . . . . .172
Command/Indicate Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .173
IOM®-2 Handler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .173
Monitor Handler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .173
C/I Channel Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .177
D-Channel Priority Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .178
IOM®-2 Interrupt Vector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . .179
Monitor Interrupt Vector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .179
C/I Interrupt Vector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .179
9 General Purpose Port. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .180
10 Reset and Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .182
10.1 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .182
10.2 Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .185
11
11.1
11.2
11.2.1
11.2.2
11.2.3
11.2.4
Slave Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .186
Register Set Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .186
Register Bit Field Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .189
MUNICH32X Global Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .189
Serial PCM Core Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .197
LBI Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .209
GPP Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .223
Semiconductor Group
4
1998-08-01

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PEB20321 전자부품, 판매, 대치품
PEB 20321
Introduction
1 Introduction
The MUNICH32X is an enhanced version of the Multichannel Network Interface
Controller for HDLC, MUNICH32 (PEB 20320, refer to the User’s Manual 01.96).
Key enhancements include:
• a 33 MHz/32-bit PCI bus Master/Slave interface with integrated DMA controllers for
higher performance, lower development effort and risk,
• symmetrical Rx and Tx buffer descriptor formats for faster switching,
• an improved Tx idle channel polling process for significantly reduced bus occupancy,
• an integrated Local Bus Interface (LBI) for connection to other peripherals that do not
have a PCI bus interface with DMA capability,
• an SSC interface and
• an IOM®-2 interface.
The MUNICH32X provides capability for up to 32 full-duplex serial PCM channels. It
performs layer 2 HDLC formatting/deformatting or V.110 or X.30 protocols up to
a network data rate of 38.4 Kbit/s (V.110) or 64 Kbit/s (HDLC), as well as transparent
transmission for the DMI mode 0, 1, and 2. Processed data are passed on to an external
memory shared with one or more host processors.
The MUNICH32X is compatible with the LAPD ISDN (Integrated Services Digital
Network) protocol specified by CCITT, as well as with HDLC, SDLC, LAPB and DMI
protocols. It provides any rate adaption for time slot transmission data rate from 64 Kbit/s
down to 8 Kbit/s and the concatenation of any time slots to data channels, supporting the
ISDN H0, H11, H12 superchannels.
The MUNICH32X may be used in a wide range of telecommunication and networking
applications, e.g.
• in switches to provide the connection to a PBX, to a host computer, or as a central
D-channel controller for 32 D-channels,
• for connection of up to 4 MUNICH32Xs to one PCM highway to achieve a D-channel
controller with 128 channels,
• in routers and bridges for LAN-WAN internetworking via channelized T1/E1 or multiple
S/T interfaces,
• for wide area trunk cards in routers and switches (Frame Relay, ISDN PRI, Internet
Protocols, etc.), and
• for centralized D- or B-channel packet processing in routers, switches (Frame Relay,
Q.931 Signaling, X.25, etc.)
Note: In the course of the Data Sheet, the expression ‘DWORD’ always refers to 32-bit
words in correspondence to the PCI specification.
Semiconductor Group
7
1998-08-01

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관련 데이터시트

부품번호상세설명 및 기능제조사
PEB20320

ICs for Communications

Infineon Technologies AG
Infineon Technologies AG
PEB20321

Multichannel Network Interface Controller for HDLC MUNICH32X

Siemens Semiconductor Group
Siemens Semiconductor Group

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