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PDF MC-4R256FKE8D Data sheet ( Hoja de datos )
| Número de pieza | MC-4R256FKE8D | |
| Descripción | Direct Rambus DRAM RIMM Module 256M-BYTE (128M-WORD x 18-BIT) | |
| Fabricantes | Elpida Memory | |
| Logotipo |  |
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DATA SHEET
MOS INTEGRATED CIRCUIT
MC-4R256FKE8D
Direct Rambus DRAM RIMMTM Module
256M-BYTE (128M-WORD x 18-BIT)
Description
The Direct Rambus RIMM module is a general-purpose high-performance memory module subsystem suitable for
use in a broad range of applications including computer memory, personal computers, workstations, and other
applications where high bandwidth and low latency are required.
MC-4R256FKE8D modules consists of eight 288M Direct Rambus DRAM (Direct RDRAM) devices (µPD488588).
These are extremely high-speed CMOS DRAMs organized as 16M words by 18 bits. The use of Rambus Signaling
Level (RSL) technology permits 600MHz, 711MHz or 800MHz transfer rates while using conventional system and
board design technologies.
Direct RDRAM devices are capable of sustained data transfers at 1.25 ns per two bytes (10 ns per sixteen bytes).
The architecture of the Direct RDRAM enables the highest sustained bandwidth for multiple, simultaneous,
randomly addressed memory transactions. The separate control and data buses with independent row and column
control yield over 95 % bus efficiency. The Direct RDRAM's 32 banks support up to four simultaneous transactions
per device.
Features
• 184 edge connector pads with 1mm pad spacing
• 256 MB Direct RDRAM storage
• Each RDRAM has 32 banks, for 256 banks total on module
• Gold plated contacts
• RDRAMs use Chip Scale Package (CSP)
• Serial Presence Detect support
• Operates from a 2.5 V supply
• Powerdown self refresh modes
• Separate Row and Column buses for higher efficiency
• Over Drive Factor (ODF) support
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local Elpida Memory, Inc. for
availability and additional information.
Document No. E0079N20 (Ver 2.0)
Date Published May 2002 (K) Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2001-2002
NEC Corporation. 2000
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
1 page  
MC-4R256FKE8D
Module Connector Pad Description
(1/2)
Signal
GND
LCFM
I/O
–
I
LCFMN
I
LCMD
I
LCOL4..LCOL0
I
LCTM
I
LCTMN
I
LDQA8..LDQA0 I/O
LDQB8..LDQB0 I/O
LROW2..LROW0
LSCK
I
I
NC –
RCFM
I
RCFMN
I
RCMD
I
RCOL4..RCOL0
I
RCTM
I
RCTMN
I
RDQA8..RDQA0 I/O
RDQB8..RDQB0 I/O
RROW2..RROW0 I
Type
–
RSL
RSL
VCMOS
RSL
RSL
RSL
RSL
RSL
RSL
VCMOS
–
RSL
RSL
VCMOS
RSL
RSL
RSL
RSL
RSL
RSL
Description
Ground reference for RDRAM core and interface. 72 PCB connector pads.
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Positive polarity.
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Negative polarity.
Serial Command used to read from and write to the control registers. Also used
for power management.
Column bus. 5-bit bus containing control and address information for column
accesses.
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Positive polarity.
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Negative polarity.
Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. LDQA8 is non-functional on modules with x16 RDRAM devices.
Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. LDQB8 is non-functional on modules with x16 RDRAM devices.
Row bus. 3-bit bus containing control and address information for row accesses.
Serial clock input. Clock source used to read from and write to the RDRAM
control registers.
These pads are not connected. These 24 connector pads are reserved for future
use.
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Positive polarity.
Clock from master. Interface clock used for receiving RSL signals from the
Channel. Negative polarity.
Serial Command Input used to read from and write to the control registers. Also
used for power management.
Column bus. 5-bit bus containing control and address information for column
accesses.
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Positive polarity.
Clock to master. Interface clock used for transmitting RSL signals to the
Channel. Negative polarity.
Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. RDQA8 is non-functional on modules with x16 RDRAM devices.
Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel
and the RDRAM. RDQB8 is non-functional on modules with x16 RDRAM devices.
Row bus. 3-bit bus containing control and address information for row accesses.
Data Sheet E0079N20 (Ver 2.0)
5
5 Page 
MC-4R256FKE8D
Package Drawings
184 EDGE CONNECTOR PADS RIMM (SOCKET TYPE) (1/2)
R
P
S
ON M
K
G
L
A (AREA B)
288 M Direct RDRAM
A
B
HI
DE
B
C
A1 (AREA A)
EEPROM
J
F
M1 (AREA B)
Q
M2 (AREA A)
T
detail of A part
W R1.00
Y
X
detail of B part
C1
R1.00
B1
Z
ITEM
A
A1
B
B1
C
C1
D
E
F
G
H
I
J
K
L
M
M1
M2
N
O
P
Q
R
S
T
W
X
Y
Z
MILLIMETERS
133.35 TYP.
133.35±0.13
55.175
1.00±0.10
11.50
3.00±0.10
45.00
32.00
45.00
5.675
47.625
25.40
47.625
6.35
1.00 TYP.
34.925±0.13
15.145
19.78
29.21
17.78
4.00±0.10
R 2.00
3.00±0.10
φ 2.44
1.27±0.10
0.80±0.05
2.99
0.30
2.00±0.10
ECA-TS2-0013-02
Data Sheet E0079N20 (Ver 2.0)
11
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