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PDF MC10H211P Data sheet ( Hoja de datos )

Número de pieza MC10H211P
Descripción Dual 3-Input 3-Output NOR Gate
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 3-Input 3-Output NOR
Gate
The MC10H211 is designed to drive up to six transmission lines simultan–
eously. The multiple outputs of this device also allow the wire “OR”–ing of
several levels of gating for minimization of gate and package count.
The ability to control three parallel lines with minimum propagation delay
from a single point makes the MC10H211 particularly useful in clock distribution
applications where minimum clock skew is desired.
Propagation Delay, 1.0 ns Typical
Power Dissipation, 160 mW Typical
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 0)
Input Voltage (VCC = 0)
Output Current — Continuous
— Surge
VEE
VI
Iout
–8.0 to 0
0 to VEE
50
100
Vdc
Vdc
mA
Operating Temperature Range
Storage Temperature Range — Plastic
— Ceramic
TA
0 to +75
°C
Tstg
–55 to +150
°C
–55 to +165
°C
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)
0° 25° 75°
Characteristic
Symbol Min Max Min Max Min Max Unit
Power Supply Current
Input Current High
Input Current Low
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
AC PARAMETERS
IE
IinH
IinL
VOH
VOL
VIH
VIL
0.5
–1.02
–1.95
–1.17
–1.95
42 —
720 —
— 0.5
–0.84 –0.98
–1.63 –1.95
–0.84 –1.13
–1.48 –1.95
38
450
–0.81
–1.63
–0.81
–1.48
0.3
–0.92
–1.95
–1.07
–1.95
42
450
–0.735
–1.60
–0.735
–1.45
mA
µA
µA
Vdc
Vdc
Vdc
Vdc
Propagation Delay
tpd 0.7 1.6 0.7 1.6 0.7 1.7 ns
Rise Time
tr 0.9 2.0 0.9 2.2 0.9 2.4 ns
Fall Time
tf 0.9 2.0 0.9 2.2 0.9 2.4 ns
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed
circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated
through a 50–ohm resistor to –2.0 volts.
Note: If crosstalk is present, double bypass capacitor to 0.2 µF.
MC10H211
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
LOGIC DIAGRAM
2
53
64
7
12
9 13
10 14
11
VCC1 = PINS 1, 15
VCC2 = PIN 16
VEE = PIN 8
DIP
PIN ASSIGNMENT
VCC1
AOUT
AOUT
AOUT
AIN
AIN
AIN
VEE
1
2
3
4
5
6
7
8
16 VCC2
15 VCC1
14 BOUT
13 BOUT
12 BOUT
11 BIN
10 BIN
9 BIN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
© Motorola, Inc. 1996
2–296
REV 5

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