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PDF MC14035B Data sheet ( Hoja de datos )
| Número de pieza | MC14035B | |
| Descripción | 4-Bit Parallel-In/Parallel-Out Shift Register | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MC14035B (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
4-Bit Parallel-In/Parallel-Out
Shift Register
The MC14035B 4–bit shift register is constructed with MOS P–channel
and N–channel enhancement mode devices in a single monolithic structure.
It consists of a 4–stage clocked serial–shift register with synchronous
parallel inputs and buffered parallel outputs. The Parallel/Serial (P/S) input
allows serial–right shifting of data or synchronous parallel loading via inputs
DP0 thru DP3. The True/Complement (T/C) input determines whether the
outputs display the Q or Q outputs of the flip–flop stages. J–K logic forms the
serial input to the first stage. With the J and K inputs connected together they
operate as a serial “D” input.
This device may be effectively used for shift–right/shift–left registers,
parallel–to–serial/serial–to–parallel conversion, sequence generation, up/
down Johnson or ring counters, pseudo–random code generation, frequen-
cy and phase comparators, sample and hold registers, etc . . .
• 4–Stage Clocked Serial–Shift Operation
• Synchronous Parallel Loading of all Four Stages
• J–K Serial Inputs on First Stage
• Asynchronous True/Complement Control of all Outputs
• Fully Static Operation
• Asynchronous Master Reset
• Data Transfer Occurs on the Positive–Going Clock Transition
• No Limit on Clock Rise and Fall Times
• All Inputs are Buffered
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎΕ Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS* (Voltages Referenced to VSS)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVDD DC Supply Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin, Vout Input or Output Voltage (DC or Transient)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎlin, lout Input or Output Current (DC or Transient),
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎper Pin
– 0.5 to + 18.0
– 0.5 to VDD + 0.5
± 10
V
V
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPD Power Dissipation, per Package†
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTstg Storage Temperature
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTL Lead Temperature(8–SecondSoldering)
500
– 65 to + 150
260
mW
_C
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
TRUTH TABLE
Inputs
tn Output
C J KR
Q0
000
0
0 1 0 Q0 (n – 1)
1 0 0 Q0 (n – 1)
110
1
X X 0 Q0 (n – 1)
XXX1
0
X = Don’t Care
P/S = 0 = Serial Mode
T/C = 1 = True Outputs
REV 3
1/94
©MMCot1or4o0la3, I5nBc. 1995
144
MC14035B
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
PIN ASSIGNMENT
Q0 1
T/C 2
16 VDD
15 Q1
K3
14 Q2
J4
13 Q3
R5
C6
P/S 7
VSS 8
12 DP3
11 DP2
10 DP1
9 DP0
MOTOROLA CMOS LOGIC DATA
1 page  
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
–A–
16 9
–B–
18
CL
–T–
SEATING
PLANE
F
NK
E
G
D 16 PL
0.25 (0.010) M T A S
M
J 16 PL
0.25 (0.010) M T B S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.750 0.785 19.05 19.93
B 0.240 0.295 6.10 7.49
C ––– 0.200 ––– 5.08
D 0.015 0.020 0.39 0.50
E 0.050 BSC
1.27 BSC
F 0.055 0.065 1.40 1.65
G 0.100 BSC
2.54 BSC
H 0.008 0.015 0.21 0.38
K 0.125 0.170 3.18 4.31
L 0.300 BSC
7.62 BSC
M 0_ 15_ 0_ 15_
N 0.020 0.040 0.51 1.01
–A–
16
1
H
G
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
9
B
8
FC
S
L
–T–
SEATING
PLANE
KJ
D 16 PL
0.25 (0.010) M T A M
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC
2.54 BSC
H 0.050 BSC
1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0_ 10_ 0_ 10 _
S 0.020 0.040 0.51 1.01
MC14035B
148
MOTOROLA CMOS LOGIC DATA
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet MC14035B.PDF ] | |
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