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부품번호 | MC14040B 기능 |
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기능 | 12-Bit Binary Counter | ||
제조업체 | ON Semiconductor | ||
로고 | |||
전체 9 페이지수
MC14040B
12-Bit Binary Counter
The MC14040B 12−stage binary counter is constructed with MOS
P−Channel and N−Channel enhancement mode devices in a single
monolithic structure. This part is designed with an input wave shaping
circuit and 12 stages of ripple−carry binary counter. The device
advances the count on the negative−going edge of the clock pulse.
Applications include time delay circuits, counter controls, and
frequency−driving circuits.
Features
• Fully Static Operation
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low−power TTL Loads or One
Low−power Schottky TTL Load Over the Rated Temperature
Range
• Common Reset Line
• Pin−for−Pin Replacement for CD4040B
• These Devices are Pb−Free and are RoHS Compliant
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
−0.5 to +18.0
−0.5 to VDD + 0.5
V
V
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
± 10 mA
PD Power Dissipation, per Package
(Note 1)
500 mW
TA Ambient Temperature Range
Tstg Storage Temperature Range
TL Lead Temperature
(8−Second Soldering)
−55 to +125
−65 to +150
260
°C
°C
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
MARKING
DIAGRAMS
PDIP−16 16
P SUFFIX
CASE 648 1
MC14040BCP
AWLYYWWG
SOIC−16
D SUFFIX
CASE 751B
16
14040BG
AWLYWW
1
TSSOP−16
DT SUFFIX
CASE 948F
16
14
040B
ALYW G
G
1
SOEIAJ−16
F SUFFIX
CASE 966
16
MC14040B
ALYWG
1
A
WL, L
YY, Y
WW, W
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
April, 2013 − Rev. 10
1
Publication Order Number:
MC14040B/D
MC14040B
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSWITCHING CHARACTERISTICS (Note 5) (CL = 50 pF, TA = 25_C)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCharacteristic
Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎOutput Rise and Fall Time
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTTLH, TTHL = (1.5 ns/pF) CL + 25 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTTLH, TTHL = (0.75 ns/pF) CL + 12.5 ns
TTLH, TTHL = (0.55 ns/pF) CL + 9.5 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPropagation Delay Time
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎClock to Q1
tPHL, tPLH = (1.7 ns/pF) CL + 315 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHL, tPLH = (0.66 ns/pF) CL + 137 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHL, tPLH = (0.5 ns/pF) CL + 95 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎClock to Q12
tPHL, tPLH = (1.7 ns/pF) CL + 2415 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHL, tPLH = (0.66 ns/pF) CL + 867 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHL, tPLH = (0.5 ns/pF) CL + 475 ns
Propagation Delay Time
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎReset to Qn
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHL = (1.7 ns/pF) CL + 485 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtPHL = (0.86 ns/pF) CL + 182 ns
tPHL = (0.5 ns/pF) CL + 145 ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎClock Pulse Width
tTLH,
tTHL
tPLH,
tPHL
tPHL
tWH
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎClock Pulse Frequency
fcl
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎClock Rise and Fall Time
tTLH, tTHL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎReset Pulse Width
tWH
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎReset Removal Time
trem
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ5. The formulas given are for the typical characteristics only at 25_C.
VDD
Vdc
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
Min Typ Max Unit
(Note 6)
ns
− 100 200
− 50 100
− 40 80
ns
− 260 520
− 115 230
− 80 160
ns
−
1625
3250
− 720 1440
− 500 1000
ns
− 370 740
− 155 310
− 115 230
385 140
150 55
115 38
− ns
−
−
− 2.1 1.5 MHz
− 7.0 3.5
− 10.0 4.5
No Limit
ns
960 320
360 120
270 80
130 65
50 25
30 15
− ns
−
−
− ns
−
−
6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
500 mF
VDD
ID
0.01 mF
CERAMIC
PULSE
GENERATOR
C Q1
Q2
R Qn
VSS
CL
CL
CL
CLOCK
20 ns
90%
50%
10%
50% DUTY CYCLE
20 ns
VDD
VSS
Figure 1. Power Dissipation Test Circuit
and Waveform
PULSE
GENERATOR
VDD
C Q1
Q2
R Qn
VSS
CL
CL
CL
CLOCK
20 ns
tPLH
90%
50%
10%
tWH
20 ns
tPHL
Q
90%
50%
10%
tTLH tTHL
Figure 2. Switching Time Test Circuit
and Waveforms
http://onsemi.com
4
4페이지 −A−
16
1
MC14040B
PACKAGE DIMENSIONS
SOIC−16
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B−05
ISSUE K
9
−B− P 8 PL
8 0.25 (0.010) M B S
G
−T− SEATING
PLANE
K
C
D 16 PL
0.25 (0.010) M T B S A S
R X 45_
F
MJ
SOLDERING FOOTPRINT*
8X
6.40
16X 1.12
1 16
16X
0.58
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC
0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0_ 7_ 0_ 7_
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019
1.27
PITCH
89
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
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부품번호 | 상세설명 및 기능 | 제조사 |
MC14040B | 12-Bit Binary Counter | ON Semiconductor |
MC14040B | 12-Bit Binary Counter | Motorola Semiconductors |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |