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MC14049B 데이터시트 PDF




ON Semiconductor에서 제조한 전자 부품 MC14049B은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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기능 Hex Buffer
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MC14049B 데이터시트, 핀배열, 회로
MC14049B, MC14050B
Hex Buffer
The MC14049B Hex Inverter/Buffer and MC14050B Noninverting
Hex Buffer are constructed with MOS P−Channel and N−Channel
enhancement mode devices in a single monolithic structure. These
complementary MOS devices find primary use where low power
dissipation and/or high noise immunity is desired. These devices
provide logic level conversion using only one supply voltage, VDD.
The input−signal high level (VIH) can exceed the VDD supply
voltage for logic level conversions. Two TTL/DTL loads can be driven
when the devices are used as a CMOS−to−TTL/DTL converter
(VDD = 5.0 V, VOL 0.4 V, IOL 3.2 mA).
Note that pins 13 and 16 are not connected internally on these
devices; consequently connections to these terminals will not affect
circuit operation.
Features
High Source and Sink Currents
High−to−Low Level Converter
Supply Voltage Range = 3.0 V to 18 V
VIN can exceed VDD
Meets JEDEC B Specifications
Improved ESD Protection On All Inputs
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD DC Supply Voltage Range
−0.5 to +18.0 V
Vin Input Voltage Range (DC or Transient) −0.5 to +18.0 V
Vout Output Voltage Range (DC or Transient) −0.5 to VDD + V
0.5
Iin Input Current (DC or Transient) per Pin
Iout Output Current (DC or Transient) per Pin
PD Power Dissipation, per Package (Note 1)
(Plastic)
(SOIC)
± 10
± 45
825
740
mA
mA
mW
TA Ambient Temperature Range
−55 to +125 °C
Tstg Storage Temperature Range
−65 to +150 °C
TL Lead Temperature (8−Second Soldering)
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: See Figure 3.
This device contains protection circuitry to protect the inputs against damage
due to high static voltages or electric fields referenced to the VSS pin only. Extra
precautions must be taken to avoid applications of any voltage higher than the
maximum rated voltages to this high−impedance circuit. For proper operation, the
ranges VSS Vin 18 V and VSS Vout VDD are recommended.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 9
1
http://onsemi.com
SOIC−16
D SUFFIX
CASE 751B
SOEIAJ−16
F SUFFIX
CASE 966
TSSOP−16
DT SUFFIX
CASE 948F
PIN ASSIGNMENT
VDD
OUTA
INA
OUTB
INB
OUTC
INC
VSS
1
2
3
4
5
6
7
8
16 NC
15 OUTF
14 INF
13 NC
12 OUTE
11 INE
10 OUTD
9 IND
MARKING DIAGRAMS
16
140xxBG
AWLYWW
16
MC140xxB
ALYWG
1
SOIC−16
1
SOEIAJ−16
16
14
050B
ALYWG
G
1
TSSOP−16
xx
A
WL, L
YY, Y
WW, W
G or G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Publication Order Number:
MC14049B/D




MC14049B pdf, 반도체, 판매, 대치품
MC14049B, MC14050B
AC SWITCHING CHARACTERISTICS (Note 5) (CL = 50 pF, TA = + 25_C)
Characteristic
Symbol
VDD
Vdc
Typ
Min (Note 6) Max
Output Rise Time
tTLH = (0.7 ns/pF) CL + 65 ns
tTLH = (0.25 ns/pF) CL + 37.5 ns
tTLH = (0.2 ns/pF) CL + 30 ns
tTLH
5.0 − 100 160
10 − 50 80
15 − 40 60
Output Fall Time
tTHL = (0.2 ns/pF) CL + 30 ns
tTHL = (0.06 ns/pF) CL + 17 ns
tTHL = (0.04 ns/pF) CL + 13 ns
tTHL
5.0 − 40 60
10 − 20 40
15 − 15 30
Propagation Delay Time
tPLH = (0.33 ns/pF) CL + 63.5 ns
tPLH = (0.19 ns/pF) CL + 30.5 ns
tPLH = (0.06 ns/pF) CL + 27 ns
tPLH
5.0 − 80 140
10 − 40 80
15 − 30 60
Propagation Delay Time
tPHL = (0.2 ns/pF) CL + 30 ns
tPHL = (0.1 ns/pF) CL + 15 ns
tPHL = (0.05 ns/pF) CL + 12.5 ns
tPHL
5.0 − 40 80
10 − 20 40
15 − 15 30
5. The formulas given are for the typical characteristics only at 25_C.
6. Data labeled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
Unit
ns
ns
ns
ns
MC14049B
VDD
1
MC14050B
VDD
1
8 VSS
IOH
VOH
VDS = VOH - VDD
8 VSS
IOL
VOL
0
VGS = 5.0 Vdc
- 10
- 20
- 30 VGS = 10 Vdc
- 40 VGS = 15 Vdc
MAXIMUM CURRENT LEVEL
- 50
- 10
- 8.0 - 6.0 - 4.0 - 2.0
VDS, DRAIN-TO-SOURCE VOLTAGE (Vdc)
0
Figure 1. Typical Output Source Characteristics
MC14049B
VDD
1
8 VSS
IOL
VOL
VDD = VOL
MC14050B
VDD
1
8 VSS
IOH
VOH
160
VGS = 15 Vdc
120
80 VGS = 10 Vdc
MAXIMUM CURRENT LEVEL
40
VGS = 5.0 Vdc
0
0 2.0 4.0 6.0 8.0 10
VDS, DRAIN-TO-SOURCE VOLTAGE (Vdc)
Figure 2. Typical Output Sink Characteristics
http://onsemi.com
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MC14049B 전자부품, 판매, 대치품
MC14049B, MC14050B
PACKAGE DIMENSIONS
TSSOP−16
DT SUFFIX
CASE 948F
ISSUE B
0.15 (0.006) T U S
16
2X L/2
L
PIN 1
IDENT.
1
0.15 (0.006) T U S
0.10 (0.004)
−T− SEATING
PLANE
D
C
16X K REF
0.10 (0.004) M
9
8
A
−V−
G
TU S
B
−U−
H
VS
J1
J
N
K
SÇÇÇÉÉECTÇÇÇÉÉKIO1NÇÇÇÉÉN−N
0.25 (0.010)
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
N
F
DETAIL E
DETAIL E
−W−
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C −−− 1.20 −−− 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC
0.026 BSC
H 0.18 0.28 0.007 0.011
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC
0.252 BSC
M 0_ 8_ 0_ 8_
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
16X
0.36
16X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
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