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PDF MC14051B Data sheet ( Hoja de datos )

Número de pieza MC14051B
Descripción Analog Multiplexers/Demultiplexers
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MC14051B, MC14052B,
MC14053B
Analog
Multiplexers/Demultiplexers
The MC14051B, MC14052B, and MC14053B analog multiplexers
are digitally−controlled analog switches. The MC14051B effectively
implements an SP8T solid state switch, the MC14052B a DP4T, and
the MC14053B a Triple SPDT. All three devices feature low ON
impedance and very low OFF leakage current. Control of analog
signals up to the complete supply voltage range can be achieved.
Features
Triple Diode Protection on Control Inputs
Switch Function is Break Before Make
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Analog Voltage Range (VDD − VEE) = 3.0 to 18 V
Note: VEE must be VSS
Linearized Transfer Characteristics
Low−noise − 12 nV/Cycle, f 1.0 kHz Typical
Pin−for−Pin Replacement for CD4051, CD4052, and CD4053
For 4PDT Switch, See MC14551B
For Lower RON, Use the HC4051, HC4052, or HC4053
High−Speed CMOS Devices
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD DC Supply Voltage Range
(Referenced to VEE, VSS VEE)
−0.5 to +18.0 V
Vin, Input or Output Voltage Range
−0.5 to VDD + 0.5 V
Vout (DC or Transient) (Referenced to VSS for
Control Inputs and VEE for Switch I/O)
Iin Input Current (DC or Transient)
per Control Pin
+10 mA
ISW Switch Through Current
±25 mA
PD Power Dissipation per Package (Note 1) 500 mW
TA Ambient Temperature Range
−55 to +125
°C
Tstg Storage Temperature Range
−65 to +150
°C
TL Lead Temperature (8−Second Soldering) 260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Packages: –7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained to
the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either
VSS, VEE or VDD). Unused outputs must be left open.
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1
SOIC−16
D SUFFIX
CASE 751B
1
TSSOP−16
DT SUFFIX
CASE 948F
MARKING DIAGRAMS
16
1405xBG
AWLYWW
1
SOIC−16
16
14
05xB
ALYWG
G
1
TSSOP−16
x
A
WL, L
Y
WW, W
G or G
= 1, 2, or 3
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 14
1
Publication Order Number:
MC14051B/D

1 page




MC14051B pdf
MC14051B, MC14052B, MC14053B
IN/OUT
VDD VDD VDD
VEE
OUT/IN
LEVEL
CONVERTED
CONTROL
VDD
IN/OUT
OUT/IN
VEE CONTROL
Figure 1. Switch Circuit Schematic
TRUTH TABLE
Control Inputs
Select
ON Switches
Inhibit C* B A MC14051B MC14052B MC14053B
0 0 0 0 X0 Y0 X0 Z0 Y0 X0
0 0 0 1 X1 Y1 X1 Z0 Y0 X1
0 0 1 0 X2 Y2 X2 Z0 Y1 X0
0 0 1 1 X3 Y3 X3 Z0 Y1 X1
0 1 00
0 1 01
0 1 10
0 1 11
X4
X5
X6
X7
Z1 Y0 X0
Z1 Y0 X1
Z1 Y1 X0
Z1 Y1 X1
1 x x x None
*Not applicable for MC14052
x = Don’t Care
None
None
INH  6
A 10
B  9
X0 12
X1 14
X2 15
X3 11
Y0  1
Y1  5
Y2  2
Y3  4
16 VDD
LEVEL
CONVERTER
BINARY TO 1-OF-4
DECODER WITH
INHIBIT
8 VSS 7 VEE
13 X
3  Y
Figure 3. MC14052B Functional Diagram
INH  6
A 11
B 10
C  9
16 VDD
LEVEL
CONVERTER
BINARY TO 1-OF-8
DECODER WITH
INHIBIT
X0 13
X1 14
X2 15
X3 12
X4  1
X5  5
X6  2
X7  4
8 VSS 7 VEE
3 X
Figure 2. MC14051B Functional Diagram
INH  6
A 11
B 10
C  9
16 VDD
LEVEL
CONVERTER
BINARY TO 1-OF-2
DECODER WITH
INHIBIT
8 VSS 7 VEE
X0 12
X1 13
Y0  2
Y1  1
Z0  5
Z1  3
14 X
15 Y
4  Z
Figure 4. MC14053B Functional Diagram
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5

5 Page





MC14051B arduino
MC14051B, MC14052B, MC14053B
PACKAGE DIMENSIONS
−A−
16
1
SOIC−16
D SUFFIX
CASE 751B−05
ISSUE K
9
−B− P 8 PL
8 0.25 (0.010) M B S
−T− SEATING
PLANE
G
F
K R X 45_
C
D 16 PL
0.25 (0.010) M T B S A S
MJ
SOLDERING FOOTPRINT*
8X
6.40
16X 1.12
1 16
16X
0.58
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL CONDITION.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC
0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0_ 7_ 0_ 7_
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019
1.27
PITCH
89
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
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11
MC14051B/D

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