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M5M467805BTP-6S 데이터시트 PDF




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부품번호 M5M467805BTP-6S 기능
기능 EDO MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM
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M5M467805BTP-6S 데이터시트, 핀배열, 회로
(Rev. 1.1)
MITSUBISHI LSIs
M5M467405/465405BJ,BTP -5,-6,-5S,-6S
M5M467805/465805BJ,BTP -5,-6,-5S,-6S
M5M465165BJ,BTP -5,-6,-5S,-6S
EDO MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM
EDO MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM
EDO MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
DESCRIPTION
The M5M467405/465405BJ,BTP is organized 16777216-word by 4-bit, M5M467805/465805BJ,BTP is organized 8388608-word by
8-bit, and M5M465165BJ,BTP is organized 4194304-word by 16-bit dynamic RAMs, fabricated with the high performance CMOS
process, and are suitable for large-capacity memory systems with high speed and low power dissipation.
The use of double-layer aluminum process combined with CMOS technology and a single-transistor dynamic storage stacked
capacitor cell provide high circuit density. Multiplexed address inputs permit both a reduction in pins and an increase in system
densities.
FEATURES
Type name
RAS
CAS Address OE Cycle
access access access access
time
time time
time
time
Power
dissipa-
tion
(max.ns) (max.ns) (max.ns) (max.ns) (min.ns) (typ.mW)
M5M467405BXX-5,5S
M5M467805BXX-5,5S
50
13
25
13
84 300
M5M467405BXX-6,6S
M5M467805BXX-6,6S
60
15
30
15 104 250
M5M465405BXX-5,5S
M5M465805BXX-5,5S
50
13
25
13
84 390
M5M465405BXX-6,6S
M5M465805BXX-6,6S
60
15
30
15 104 325
XX=J,TP
Type name
M5M465165BXX-5,5S
M5M465165BXX-6,6S
RAS
CAS Address OE
access access access access
time
time time
time
Cycle
time
Power
dissipa-
tion
(max.ns) (max.ns) (max.ns) (max.ns) (min.ns) (typ.mW)
50 13 25 13 84 420
60 15 30 15 104 390
Standard 32 pin SOJ, 32 pin TSOP (M5M467405Bxx/M5M465405Bxx/M5M467805Bxx/M5M465805Bxx)
Standard 50 pin SOJ, 50 pin TSOP (M5M465165Bxx)
Single 3.3 ± 0.3V supply
Low stand-by power dissipation
1.8mW (Max)
LVCMOS input level
Low operating power dissipation
M5M467405Bxx-5,5S / M5M467805Bxx-5,5S
360.0mW (Max)
M5M467405Bxx-6,6S / M5M467805Bxx-6,6S
324.0mW (Max)
M5M465405Bxx-5,5S / M5M465805Bxx-5,5S
468.0mW (Max)
M5M465405Bxx-6,6S / M5M465805Bxx-6,6S
432.0mW (Max)
M5M465165Bxx-5,5S
504.0mW (Max)
M5M465165Bxx-6,6S
468.0mW (Max)
Self refresh capability*
Self refresh current
400µA (Max)
EDO mode , Read-modify-write, CAS before RAS refresh, Hidden refresh capabilities
Early-write mode , OE and W to control output buffer impedance
All inputs, outputs LVTTL compatible and low capacitance
* :Applicable to self refresh version(M5M467405/465405/467805/465805/465165BJ,BTP-5S,-6S:option) only
ADDRESS
Part No.
Row Add Col Add
Refresh
Refresh Cycle
Normal S-version
RAS Only Ref,Normal R/W 8192/64ms 8192/128ms
M5M467405Bxx A0-A12 A0-A10
CBR Ref,Hidden Ref
4096/64ms 4096/128ms
M5M465405Bxx A0-A11
A0-A11
RAS Only Ref,Normal R/W
CBR Ref,Hidden Ref
4096/64ms
4096/128ms
RAS Only Ref,Normal R/W 8192/64ms 8192/128ms
M5M467805Bxx A0-A12 A0-A9
CBR Ref,Hidden Ref
4096/64ms 4096/128ms
M5M465805Bxx A0-A11
A0-A10
RAS Only Ref,Normal R/W
CBR Ref,Hidden Ref
4096/64ms
4096/128ms
M5M465165Bxx A0-A11 A0-A9
RAS Only Ref,Normal R/W
CBR Ref,Hidden Ref
4096/64ms
4096/128ms
APPLICATION
Main memory unit for computers, Microcomputer memory, Refresh memory for CRT
1
MITSUBISHI
Jun. 1999
ELECTRIC




M5M467805BTP-6S pdf, 반도체, 판매, 대치품
(Rev. 1.1)
MITSUBISHI LSIs
M5M467405/465405BJ,BTP -5,-6,-5S,-6S
M5M467805/465805BJ,BTP -5,-6,-5S,-6S
M5M465165BJ,BTP -5,-6,-5S,-6S
EDO MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM
EDO MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM
EDO MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
FUNCTION
The M5M467405(805)/465405(805,165)BJ, BTP provide, in addition to normal read, write, and read-modify-write operations,
a number of other functions, e.g., EDO mode, CAS before RAS refresh, and delayed-write.
The input conditions for each are shown in Table 1.
Table 1 Input conditions for each mode
M5M467405Bxx / M5M465405Bxx / M5M467805Bxx / M5M465805Bxx
Operation
Read
Write (Early write)
Write (Delayed write)
Read-modify-write
RAS-only refresh
Hidden refresh
CAS before RAS refresh
Standby
RAS
ACT
ACT
ACT
ACT
ACT
ACT
ACT
NAC
CAS
ACT
ACT
ACT
ACT
NAC
ACT
ACT
DNC
Inputs
W
NAC
ACT
ACT
ACT
DNC
DNC
NAC
DNC
OE
ACT
DNC
DNC
ACT
DNC
ACT
DNC
DNC
Row
address
APD
APD
APD
APD
APD
DNC
DNC
DNC
Column
address
APD
APD
APD
APD
DNC
DNC
DNC
DNC
Input/Output
Input
OPN
VLD
VLD
VLD
OPN
OPN
DNC
DNC
Output
VLD
OPN
IVD
VLD
OPN
VLD
OPN
OPN
Refresh Remark
NO
NO
NO
NO
YES
YES
YES
NO
EDO mode
identical
M5M465165Bxx
Operation
Lower byte read
Upper byte read
Word read
Lower byte write
Upper byte write
Word write
RAS-only refresh
Hidden refresh
CAS before RAS refresh
Stand-by
RAS
ACT
ACT
ACT
ACT
ACT
ACT
ACT
ACT
ACT
NAC
LCAS
ACT
NAC
ACT
ACT
NAC
ACT
NAC
ACT
ACT
DNC
Inputs
UCAS
NAC
ACT
ACT
NAC
ACT
ACT
NAC
ACT
ACT
DNC
W
NAC
NAC
NAC
ACT
ACT
ACT
DNC
NAC
DNC
DNC
OE
ACT
ACT
ACT
NAC
NAC
NAC
DNC
ACT
DNC
DNC
Row
address
APD
APD
APD
APD
APD
APD
APD
DNC
DNC
DNC
Note : ACT : active, NAC : nonactive, DNC : don' t care, VLD : valid, IVD : Invalid, APD : applied, OPN : open
Column
address
APD
APD
APD
APD
APD
APD
DNC
DNC
DNC
DNC
Input/Output
DQ1~DQ8 DQ9~DQ16
VLD
OPN
OPN
VLD
VLD
VLD
DIN DNC
DNC
DIN
DIN
OPN
DIN
OPN
VLD
VLD
OPN
OPN
OPN
OPN
Refresh Remark
NO
NO
NO
NO
NO
NO
YES
YES
YES
NO
EDO mode
identical
4
MITSUBISHI
Jun. 1999
ELECTRIC

4페이지










M5M467805BTP-6S 전자부품, 판매, 대치품
(Rev. 1.1)
MITSUBISHI LSIs
M5M467405/465405BJ,BTP -5,-6,-5S,-6S
M5M467805/465805BJ,BTP -5,-6,-5S,-6S
M5M465165BJ,BTP -5,-6,-5S,-6S
EDO MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM
EDO MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM
EDO MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Vcc
VI
V0
I0
Pd
Topr
Tstg
Supply voltage
Input voltage
Output voltage
Output current
Power dissipation
Operating temperature
Storage temperature
Conditions
With respect to Vss
Ta=25 C
Ratings
-0.5 ~ 4.6
-0.5 ~ 4.6
-0.5 ~ 4.6
50
1000
0 ~ 70
-65 ~ 150
Unit
V
V
V
mA
mW
C
C
RECOMMENDED OPERATING CONDITIONS (Ta=0 ~70 C, unless otherwise noted) (Note 1)
Symbol
Parameter
Limits
Min Nom Max
Unit
Vcc Supply voltage
Vss Supply voltage
VIH High-level input voltage, all inputs
3.0 3.3
3.6
00
0
2.0 Vcc+0.3
V
V
V
VIL Low-level input voltage, all inputs
-0.3 0.8 V
Note 1 : All voltage values are with respect to Vss.
ELECTRICAL CHARACTERISTICS (Ta=0 ~ 70 C, Vcc=3.3 ± 0.3V, Vss=0V, unless otherwise noted) (Note 2)
[M5M467405B / M5M467805B]
Symbol
Parameter
Test conditions
VOH
VOL
IOZ
II
ICC1 (AV)
ICC2 (AV)
ICC4 (AV)
ICC6 (AV)
High-level output voltage
Low-level output voltage
Off-state output current
Input current
Average supply current
from Vcc
operating
(Note 3,4,5)
Average supply current
from Vcc
stand-by
(Note 6)
Average supply current
from Vcc
EDO-Mode
(Note 3,4,5)
Average supply current
from Vcc
CAS before RAS refresh
mode
(Note 3,5)
IOH=-2mA
M5M467405B-5,5S
M5M467805B-5,5S
M5M467405B-6,6S
M5M467805B-6,6S
M5M467405B-5,5S
-6,6S
M5M467805B-5,5S
-6,6S
IOL=2mA
Q floating 0V VOUT Vcc
0VVIN Vcc+0.3V, Other input pins=0V
RAS, CAS cycling
tRC=tWC=min.
output open
RAS= CAS =VIH, output open
M5M467405B-5,6
M5M467805B-5,6
M5M467405B-5S,6S
RAS= CAS Vcc -0.2V,output open
M5M467805B-5S,6S
M5M467405B-5,5S
M5M467805B-5,5S
M5M467405B-6,6S
M5M467805B-6,6S
RAS=VIL, CAS cycling
tHPC=min.
output open
M5M467405B-5,5S
M5M467805B-5,5S
M5M467405B-6,6S
M5M467805B-6,6S
CAS before RAS refresh cycling
tRC=min.
output open
Limits
Min Typ Max
2.4 Vcc
0 0.4
-10 10
-10 10
100
90
1
0.5
0.3
100
90
130
120
Note 2: Current flowing into an IC is positive, out is negative.
3: Icc1 (AV) , Icc4 (AV) and Icc6 (AV) are dependent on cycle rate. Maximum current is measured at the fastest cycle rate.
4: Icc1 (AV) and Icc4 (AV) are dependent on output loading. Specified values are obtained with the output open.
5: Column Address can be changed once or less while RAS=VIL and CAS=VIH.
Unit
V
V
µA
µA
mA
mA
mA
mA
7
MITSUBISHI
Jun. 1999
ELECTRIC

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