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M5M5V4R04J-15 데이터시트 PDF




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부품번호 M5M5V4R04J-15 기능
기능 4194304-BIT (1048576-WORD BY 4-BIT) CMOS STATIC RAM
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M5M5V4R04J-15 데이터시트, 핀배열, 회로
MITSUBISHI LSIs
M5M5V4R04J-12,-15
1997.11.20 Rev.F
4194304-BIT (1048576-WORD BY 4-BIT) CMOS STATIC RAM
DESCRIPTION
The M5M5V4R04J is a family of 1048576-word by 4-bit static PIN CONFIGURATION (TOP VIEW)
RAMs, fabricated with the high performance CMOS silicon gate
process and designed for high speed application.
The M5M5V4R04J is offered in a 32-pin plastic small outline J-
lead package(SOJ).
These device operate on a single 3.3V supply, and are directly
TTL compatible. They include a power down feature as well.
FEATURES
• Fast access time M5M5V4R04J-12 •••• 12ns(max)
M5M5V4R04J-15 •••• 15ns(max)
• Low power dissipation Active •••••••••• 297mW(typ)
Stand by ••••••• 3.3mW(typ)
• Single +3.3V power supply
• Fully static operation : No clocks, No refresh
• Common data I/O
• Easy memory expansion by S
• Three-state outputs : OR-tie capability
• OE prevents data contention in the I/O bus
• Directly TTL compatible : All inputs and outputs
A0 1
address
inputs
A1 2
A2 3
A3 4
chip select A4 5
input
S6
data inputs/
outputs(3.3V)
DQ1
VCC
7
8
(0V) GND 9
data inputs/
outputs
DQ2 10
write control W 11
input
A5 12
address
inputs
A6 13
A7 14
A8 15
A9 16
Outline
32 A19
31 A18
30 A17
29 A16
address
inputs
28 A15
27 OE
output enable
input
26 DQ4 data inputs/
25 GND (0V) outputs
24 VCC (3.3V)
23 DQ3
22 A14
data inputs/
outputs
21 A13
20 A12
19 A11
18 A10
address
inputs
17 NC
32P0K(SOJ)
APPLICATION
High-speed memory units
BLOCK DIAGRAM
address
inputs
A0 1
A1 2
A2 3
A3 4
A4 5
A5 12
A6 13
A7 14
A8 15
S6
W 11
OE 27
PACKAGE
32pin 400mil SOJ
MEMORY ARRAY
512 ROWS
8192 COLUMNS
COLUMN I/O CIRCUITS
COLCUOMLUNMN ADDRESS
ADDREDSESCODERS
DECODERS
COLUMN INPUT BUFFERS
16 18 19 20 21 22 28 29 30 31 32
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
address
inputs
MITSUBISHI
ELECTRIC
7 DQ1
10 DQ2
23 DQ3
26 DQ4
data
inputs/
outputs
8
VCC (3.3V)
24
9
GND (0V)
25
1




M5M5V4R04J-15 pdf, 반도체, 판매, 대치품
(2)READ CYCLE
Symbol
Parameter
tCR
ta(A)
ta(S)
ta(OE)
tdis(S)
tdis (OE)
ten(S)
ten (OE)
tv(A)
tPU
tPD
Read cycle time
Address access time
Chip select access time
Output enable access time
Output disable time after S high
Output disable time after OE high
Output enable time after S low
Output enable time after OE low
Data valid time after address change
Power-up time after chip selection
Power-down time after chip selection
MITSUBISHI LSIs
M5M5V4R04J-12,-15
4194304-BIT (1048576-WORD BY 4-BIT) CMOS STATIC RAM
Limits
M5M5V4R04J -12 M5M5V4R04J -15
Min Max Min Max
Unit
12 15 ns
12 15 ns
12 15 ns
6 8 ns
0 6 0 7 ns
0 6 0 7 ns
0 0 ns
0 0 ns
3 3 ns
0
12
0 ns
15 ns
(3)WRITE CYCLE
Symbol
Parameter
tCW
tw(W)
Write cycle time
Write pulse width
tsu(A)1 Address setup time(W)
tsu(A)2 Address setup time(S)
tsu (S)
Chip select setup time
tsu (D)
Data setup time
th(D)
Data hold time
trec(W) Write recovery time
tdis (W) Output disable time after W low
tdis (OE) Output disable time after OE high
ten (W) Output enable time after W high
ten (OE) Output enable time after OE low
tsu(A-WH) Address to W High
Limits
M5M5V4R04J -12 M5M5V4R04J -15
Unit
Min Max Min Max
12 15 ns
10 12 ns
0 0 ns
0 0 ns
10 12 ns
6 7 ns
0 0 ns
1 1 ns
0 6 0 7 ns
0 6 0 7 ns
0 0 ns
0 0 ns
10 12 ns
MITSUBISHI
ELECTRIC
4

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관련 데이터시트

부품번호상세설명 및 기능제조사
M5M5V4R04J-12

4194304-BIT (1048576-WORD BY 4-BIT) CMOS STATIC RAM

Mitsubishi
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M5M5V4R04J-15

4194304-BIT (1048576-WORD BY 4-BIT) CMOS STATIC RAM

Mitsubishi
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