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PDF PHT6N06T Data sheet ( Hoja de datos )

Número de pieza PHT6N06T
Descripción TrenchMOS transistor Standard level FET
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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Philips Semiconductors
TrenchMOStransistor
Standard level FET
Product specification
PHT6N06T
GENERAL DESCRIPTION
N-channel enhancement mode
logic level field-effect power
transistor in a plastic envelope
suitable for surface mounting.
Using ’trench’ technology the
device features very low
on-state resistance and has
integral zener diodes giving
ESD protection. It is intended for
use in DC-DC converters and
general purpose switching
applications.
QUICK REFERENCE DATA
SYMBOL PARAMETER
VDS
ID
Ptot
Tj
RDS(ON)
Drain-source voltage
Drain current (DC) Tsp = 25 ˚C
Drain current (DC) Tamb = 25 ˚C
Total power dissipation
Junction temperature
Drain-source on-state
resistance
VGS = 10 V
MAX.
55
5.5
2.5
8.3
150
150
PINNING - SOT223
PIN DESCRIPTION
1 gate
2 drain
3 source
4 drain (tab)
PIN CONFIGURATION
4
123
SYMBOL
d
g
s
UNIT
V
A
A
W
˚C
m
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDS
VDGR
±VGS
ID
ID
IDM
Ptot
Tstg, Tj
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
-
RGS = 20 k
-
Tsp = 25 ˚C
Tamb = 25 ˚C
Tsp = 100 ˚C
Tamb = 100 ˚C
Tsp = 25 ˚C
Tamb = 25 ˚C
Tsp = 25 ˚C
Tamb = 25 ˚C
-
ESD LIMITING VALUE
SYMBOL
VC
PARAMETER
Electrostatic discharge capacitor
voltage
CONDITIONS
Human body model
(100 pF, 1.5 k)
MIN.
-
-
-
-
-
-
-
-
-
-
-
- 55
MAX.
55
55
20
5.5
2.5
3.8
1.75
22
10
8.3
1.8
150
UNIT
V
V
V
A
A
A
A
A
A
W
W
˚C
MIN.
-
MAX.
2
UNIT
kV
September 1997
1
Rev 1.000

1 page




PHT6N06T pdf
Philips Semiconductors
TrenchMOStransistor
Standard level FET
Product specification
PHT6N06T
10
ID/A
8
6
4
Tj/C = 150
25
2
0
012345678
VGS/V
Fig.7. Typical transfer characteristics.
ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj
4
gfs/S
3.5
3
2.5
2
1.5
1
1 2 3 4 5 6 7 8 9 10
ID/A
Fig.8. Typical transconductance, Tj = 25 ˚C.
gfs = f(ID); conditions: VDS = 25 V
2.5 a
BUK98XX-55
Rds(on) normalised to 25degC
2
1.5
1
0.5
-100
-50
0 50 100 150 200
Tmb / degC
Fig.9. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 5 A; VGS = 10 V
VGS(TO) / V
5
max.
4
typ.
3
min.
2
BUK78xx-55
1
-0100
-50
0 50
Tj / C
100 150 200
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
1E-01
Sub-Threshold Conduction
1E-02
1E-03
2% typ
98%
1E-04
1E-05
1E-06
01234
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
5
350
300
250
200
Ciss
150
100
50
0
0.01
0.1
1 VDS/V 10
Coss
Crss
100
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
September 1997
5
Rev 1.000

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