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PDF PHU101NQ03LT Data sheet ( Hoja de datos )
| Número de pieza | PHU101NQ03LT | |
| Descripción | TrenchMOS logic level FET | |
| Fabricantes | NXP Semiconductors | |
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PHP/PHU101NQ03LT
TrenchMOS™ logic level FET
Rev. 02 — 25 February 2003
Product data
1. Description
N-channel logic level field-effect power transistor in a plastic package using
TrenchMOS™ technology.
Product availability:
PHP101NQ03LT in SOT78 (TO-220AB)
PHU101NQ03LT in SOT533 (I-PAK).
2. Features
s Low gate charge
s Low on-state resistance.
3. Applications
s Optimized as a control FET in DC to DC converters.
4. Pinning information
Table 1: Pinning - SOT78, SOT533 simplified outline and symbol
Pin Description
Simplified outline
1 gate (g)
2 drain (d)
mb
3 source (s)
mb mounting base,
connected to drain (d)
Symbol
d
g
MBB076
s
MBK106
123
SOT78 (TO-220AB)
123
Top view
MBK915
SOT533 (I-PAK)
1 page  
Philips Semiconductors
PHP/PHU101NQ03LT
TrenchMOS™ logic level FET
8. Characteristics
Table 5: Characteristics
Tj = 25 °C unless otherwise specified
Symbol Parameter
Conditions
Static characteristics
V(BR)DSS drain-source breakdown voltage
VGS(th) gate-source threshold voltage
IDSS drain-source leakage current
IGSS
RDSon
gate-source leakage current
drain-source on-state resistance
Dynamic characteristics
ID = 0.25 mA; VGS = 0 V
Tj = 25 °C
Tj = −55 °C
ID = 1 mA; VDS = VGS; Figure 9
Tj = 25 °C
Tj = 175 °C
Tj = −55 °C
VDS = 30 V; VGS = 0 V
Tj = 25 °C
Tj = 175 °C
VGS = ±20 V; VDS = 0 V
VGS = 5 V; ID = 25 A; Figure 7 and 8
Tj = 25 °C
Tj = 175 °C
VGS = 10 V; ID = 25 A; Figure 7
Tj = 25 °C
Qg(tot) total gate charge
Qgs gate-source charge
Qgd gate-drain (Miller) charge
Ciss input capacitance
Coss output capacitance
Crss reverse transfer capacitance
td(on)
turn-on delay time
tr rise time
td(off)
turn-off delay time
tf fall time
Source-drain diode
ID = 50 A; VDD = 15 V; VGS = 5 V; Figure 13
VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 11
VDD = 15 V; ID = 25 A;
VGS = 4.5 V; RG = 5.6 Ω
VSD source-drain (diode forward) voltage IS = 25 A; VGS = 0 V; Figure 12
trr reverse recovery time
IS = 10 A; dIS/dt = −100 A/µs; VGS = 0 V
Qr recovered charge
Min Typ Max Unit
30 - - V
27 - - V
1 1.9 2.5 V
0.6 - - V
- - 2.9 V
- 0.05 1 µA
- - 500 µA
- 10 100 nA
- 5.8 7 mΩ
- 10.5 12.6 mΩ
- 4.5 5.5 mΩ
- 23 - nC
- 10.5 - nC
- 8 - nC
- 2180 - pF
- 600 - pF
- 225 - pF
- 23 - ns
- 90 - ns
- 37 - ns
- 33 - ns
- 0.85 1.2 V
- 37 - ns
- 33 - nC
9397 750 10927
Product data
Rev. 02 — 25 February 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
5 of 13
5 Page 
Philips Semiconductors
PHP/PHU101NQ03LT
TrenchMOS™ logic level FET
10. Revision history
Table 6: Revision history
Rev Date
CPCN
02 20030225 -
01 20020220 -
Description
Product data (9397 750 10927)
Modifications:
• Removal of PHD101NQ03LT (Now in separate data sheet).
• Removal of PHB101NQ03LT (Now in separate data sheet).
• Section 7 “Thermal characteristics” Clarification of thermal resistance table.
• Graphics updated to latest standard.
Product data (9397 750 09307); initial version
11. Trademarks
TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V.
9397 750 10927
Product data
Rev. 02 — 25 February 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
11 of 13
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| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet PHU101NQ03LT.PDF ] | |
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