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PDF MH16S72PHB-6 Data sheet ( Hoja de datos )
| Número de pieza | MH16S72PHB-6 | |
| Descripción | 1 /207 /959 /552-BIT ( 16 /777 /216-WORD BY 72-BIT ) Synchronous DYNAMIC RAM | |
| Fabricantes | Mitsubishi | |
| Logotipo |  |
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MITSUBISHI LSIs
MH16S72PHB-6
1,207,959,552-BIT ( 16,777,216-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
PRELIMINARY
Some of contents are subject to change without notice.
DESCRIPTION
The MH16S72PHB is 16777216 - word x 72-bit Synchronous
DRAM module. This consist of nine industry standard 16M x
8 Synchronous DRAMs in TSOP.
The TSOP on a card edge dual in-line package provides any
application where high densities and large of quantities
memory are required.
This is a socket-type memory module ,suitable for easy
interchange or addition of module.
FEATURES
Type name
Max.
Frequency
Access Time from CLK
[component level]
MH16S72PHB-6
133MHz
5.4ns
(CL = 3)
85pin
94pin
95pin
1pin
10pin
11pin
Utilizes industry standard 16M X 8 Synchronous DRAMs in
TSOP package
Single 3.3V +/- 0.3V supply
Max.Clock frequency 133MHz
Fully synchronous operation referenced to clock rising edge
4-bank operation controlled by BA0,BA1(Bank Address)
/CAS latency -2/3(programmable,at buffer mode)
LVTTL Interface
Burst length 1/2/4/8/Full Page(programmable)
Burst type- Sequential and interleave burst (programmable)
Random column access
Burst Write / Single Write(programmable)
Auto precharge / All bank precharge controlled by A10
Auto refresh and Self refresh
4096 refresh cycles every 64ms
124pin 40pin
125pin 41pin
APPLICATION
Main memory or graphic memory in computer systems
168pin 84pin
MIT-DS-0320-0.0
MITSUBISHI
ELECTRIC
12/May. /1999 1
1 page  
MITSUBISHI LSIs
MH16S72PHB-6
1,207,959,552-BIT ( 16,777,216-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
BASIC FUNCTIONS
The MH16S72PHB provides basic functions,bank(row)activate,burst read / write,
bank(row)precharge,and auto / self refresh.
Each command is defined by control signals of /RAS,/CAS and /WE at CK rising edge. In
addition to 3 signals,/S,CKE and A10 are used as chip select,refresh option,and precharge
option,respectively.
To know the detailed definition of commands please see the command truth table.
CK
/S
/RAS
/CAS
/WE
CKE
A10
Chip Select : L=select, H=deselect
Command
Command
define basic commands
Command
Refresh Option @refresh command
Precharge Option @precharge or read/write command
Activate(ACT) [/RAS =L, /CAS = /WE =H]
ACT command activates a row in an idle bank indicated by BA.
Read(READ) [/RAS =H,/CAS =L, /WE =H]
READ command starts burst read from the active bank indicated by BA.First output
data appears after /CAS latency. When A10 =H at this command,the bank is
deactivated after the burst read(auto-precharge,READA).
Write(WRITE) [/RAS =H, /CAS = /WE =L]
WRITE command starts burst write to the active bank indicated by BA. Total data
length to be written is set by burst length. When A10 =H at this command, the bank
is deactivated after the burst write(auto-precharge,WRITEA).
Precharge(PRE) [/RAS =L, /CAS =H,/WE =L]
PRE command deactivates the active bank indicated by BA. This command also
terminates burst read / write operation. When A10 =H at this command, both banks
are deactivated(precharge all, PREA).
Auto-Refresh(REFA) [/RAS =/CAS =L, /WE =CKE =H]
PEFA command starts auto-refresh cycle. Refresh address including bank address
are generated internally. After this command, the banks are precharged automatically.
MIT-DS-0320-0.0
MITSUBISHI
ELECTRIC
12/May. /1999 5
5 Page 
MITSUBISHI LSIs
MH16S72PHB-6
1,207,959,552-BIT ( 16,777,216-WORD BY 72-BIT ) Synchronous DYNAMIC RAM
FUNCTION TRUTH TABLE FOR CKE
Current State
SELF -
REFRESH*1
POWER
DOWN
ALL BANKS
IDLE*2
ANY STATE
other than
listed above
CKE CKE
n-1 n
HX
LH
LH
LH
LH
LH
LL
HX
LH
LL
HH
HL
HL
HL
HL
HL
HL
LX
HH
HL
LH
LL
/S /RAS /CAS /WE Add
Action
X X X X X INVALID
H X X X X Exit Self-Refresh(Idle after tRC)
L H H H X Exit Self-Refresh(Idle after tRC)
L H H L X ILLEGAL
L H L X X ILLEGAL
L L X X X ILLEGAL
X X X X X NOP(Maintain Self-Refresh)
X X X X X INVALID
X X X X X Exit Power Down to Idle
X X X X X NOP(Maintain Self-Refresh)
X X X X X Refer to Function Truth Table
L L L H X Enter Self-Refresh
H X X X X Enter Power Down
L H H H X Enter Power Down
L H H L X ILLEGAL
L H L X X ILLEGAL
L L X X X ILLEGAL
X X X X X Refer to Current State = Power Down
X X X X X Refer to Function Truth Table
X X X X X Begin CK0 Suspend at Next Cycle*3
X X X X X Exit CK0 Suspend at Next Cycle*3
X X X X X Maintain CK0 Suspend
ABBREVIATIONS:
H = High Level, L = Low Level, X = Don't Care
NOTES:
1. CKE Low to High transition will re-enable CK and other inputs asynchronously.
A minimum setup time must be satisfied before any command other than EXIT.
2. Power-Down and Self-Refresh can be entered only form the All banks idle State.
3. Must be legal command.
MIT-DS-0320-0.0
MITSUBISHI
ELECTRIC
12/May. /1999 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MH16S72PHB-6.PDF ] | |
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