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PDF MAX4618ESE Data sheet ( Hoja de datos )

Número de pieza MAX4618ESE
Descripción High-Speed / Low-Voltage / CMOS Analog Multiplexers/Switches
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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No Preview Available ! MAX4618ESE Hoja de datos, Descripción, Manual

19-1502; Rev 0; 7/99
High-Speed, Low-Voltage, CMOS Analog
Multiplexers/Switches
________________General Description
The MAX4617/MAX4618/MAX4619 are high-speed, low-
voltage, CMOS analog ICs configured as an 8-channel
multiplexer (MAX4617), two 4-channel multiplexers
(MAX4618), and three single-pole/double-throw (SPDT)
switches (MAX4619).
These CMOS devices can operate continuously with a
+2V to +5.5V single supply. Each switch can handle
Rail-to-Rail® analog signals. The off-leakage current is
only 1nA at TA = +25°C and 10nA at TA = +85°C.
All digital inputs have 0.8V to 2.4V logic thresholds,
ensuring TTL/CMOS-logic compatibility when using a
single +5V supply.
________________________Applications
Battery-Operated Equipment
Audio/Video Signal Routing
Low-Voltage Data-Acquisition Systems
____________________________Features
o Fast Switching Times
15ns tON
10ns tOFF
o Pin Compatible with Industry-Standard
74HC4051/74HC4052/74HC4053 and
MAX4581/MAX4582/MAX4583
o Guaranteed On-Resistance
10max (+5V Supply)
20max (+3V Supply)
o Guaranteed 1On-Resistance Match Between
Channels (single +5V supply)
o Guaranteed Low Off-Leakage Current:
1nA at +25°C
o Guaranteed Low On-Leakage Current:
1nA at +25°C
o +2V to +5.5V Single-Supply Operation
o TTL/CMOS-Logic Compatible
o Low Crosstalk: <-96dB
o High Off-Isolation: <-93dB
o Low Distortion: <0.017% (600)
_______________Ordering Information
Communications Circuits
PART
TEMP. RANGE PIN-PACKAGE
MAX4617CUE
0°C to +70°C 16 TSSOP
MAX4617CSE
0°C to +70°C 16 Narrow SO
MAX4617CPE
0°C to +70°C 16 Plastic DIP
Ordering Information continued at end of data sheet.
____________________________________Pin Configurations/Functional Diagrams
TOP VIEW
MAX4617
MAX4618
MAX4619
X4 1
X6 2
X3
X7 4
X5 5
ENABLE 6
N.C. 7
GND 8
LOGIC
16 VCC
15 X2
14 X1
13 X0
12 X3
11 A
10 B
9C
DIP/SO/TSSOP
Y0 1
Y2 2
Y3
Y3 4
Y1 5
ENABLE 6
N.C. 7
GND 8
LOGIC
16 VCC
15 X2
14 X1
13 X
12 X0
11 X3
10 A
9B
DIP/SO/TSSOP
Y1 1
Y0 2
Z1 3
Z4
Z0 5
ENABLE 6
N.C. 7
GND 8
16 VCC
15 Y
14 X
13 X1
12 X0
11 A
10 B
9C
DIP/SO/TSSOP
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.

1 page




MAX4618ESE pdf
High-Speed, Low-Voltage, CMOS Analog
Multiplexers/Switches
ELECTRICAL CHARACTERISTICS—Single +2.5V Supply
(VCC = +2.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)
PARAMETER
ANALOG SWITCH
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Switch On-Resistance
RON
VCC = 2.5V; IX, IY, IZ = 10mA;
VX, VY, VZ = 1.2V
TA = +25°C
C, E
30 60
100
SWITCH DYNAMIC CHARACTERISTICS
Enable Turn-On Time
(Note 6)
tON
VX_, VY_, VZ_ = 1V; RL = 300;
CL = 35pF; Figure 3
Enable Turn-Off Time
(Note 6)
tOFF
VX_, VY_, VZ_ = 1V; RL = 300;
CL = 35pF; Figure 3
Address Transition
Time (Note 6)
tTRANS
VX_, VY_, VZ_ = 1V; RL = 300;
CL = 35pF; Figure 3
TA = +25°C
TA = +25°C
TA = +25°C
12
10
12
ns
ns
ns
Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 3: RON = RON(MAX) - RON(MIN).
Note 4: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified
analog signal ranges; i.e., VX_, VY_, VZ_ = 3V to 0 and 0 to -3V.
Note 5: Leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at TA = +25°C.
Note 6: Guaranteed by design, not production tested.
_______________________________________________________________________________________ 5

5 Page





MAX4618ESE arduino
High-Speed, Low-Voltage, CMOS Analog
Multiplexers/Switches
______________________________________________Test Circuits/Timing Diagrams
VA, VB, VC
50
VA, VB
50
VA, VB, VC
50
VCC
VCC
A X0
B
C MAX4617 X1–X7
VCC
VA, VB, VC
VCC
0
VX0
ENABLE
GND
X
300
VOUT
35pF
VOUT
0
VX7
tTRANS
VCC
VCC
A
X0, Y0
VCC
B
X1, X2, Y1,
Y2. X3, Y3
MAX4618
ENABLE
GND
X, Y
300
A, B, C
VCC
VCC
X1, Y1, Z1
MAX4619
X2, Y2, Z2
ENABLE
GND
X, Y, Z
VCC
300
VOUT
35pF
VA, VB
VCC
0
VX0,
VY0
VOUT
0
VX3,
VY3
tTRANS
VA, VB, VC
VCC
0
VX0,
VY0,
VZ0
VOUT
35pF
VOUT
0
VX1,
VY1,
VZ1
tTRANS
50%
90%
50%
90%
50%
90%
90%
tTRANS
90%
tTRANS
90%
tTRANS
TEST EACH SECTION INDIVIDUALLY.
Figure 2. Address Transition Times
______________________________________________________________________________________ 11

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