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74LVT543PW 데이터시트 PDF




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부품번호 74LVT543PW 기능
기능 3.3V Octal latched transceiver with dual enable 3-State
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74LVT543PW 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
74LVT543
3.3V Octal latched transceiver with
dual enable (3-State)
Product specification
Supersedes data of 1994 May 20
IC23 Data Handbook
1998 Feb 19
Philips
Semiconductors




74LVT543PW pdf, 반도체, 판매, 대치품
Philips Semiconductors
3.3V Octal latched transceiver with dual enable
(3-State)
Product specification
74LVT543
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
VCC
IIK
VI
IOK
VOUT
DC supply voltage
DC input diode current
DC input voltage3
DC output diode current
DC output voltage3
IOUT
DC output current
VI < 0
VO < 0
Output in Off or High state
Output in Low state
Output in High state
–0.5 to +4.6
–50
–0.5 to +7.0
–50
–0.5 to +7.0
128
–64
V
mA
V
mA
V
mA
Tstg Storage temperature range
–65 to 150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
VI
VIH
VIL
IOH
IOL
t/v
Tamb
DC supply voltage
Input voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Low-level output current; current duty cycle 50%; f 1kHz
Input transition rise or fall rate; outputs enabled
Operating free-air temperature range
LIMITS
MIN MAX
2.7 3.6
0 5.5
2.0
0.8
–32
32
64
10
–40 +85
UNIT
V
V
V
V
mA
mA
ns/V
°C
1998 Feb 19
4

4페이지










74LVT543PW 전자부품, 판매, 대치품
Philips Semiconductors
3.3V Octal latched transceiver with dual enable
(3-State)
Product specification
74LVT543
ÉÉÉ ÉÉÉÉÉÉÉÉÉÉAn,
Bn
1.5V 1.5V
ÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉts(H)
th(H)
1.5V 1.5V
ts(L)
th(L)
2.7V
0V
LEAB, LEBA,
EAB, EBA
1.5V
tw(L)
1.5V
2.7V
0V
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
SV00114
Waveform 3. Data Setup and Hold Times And Latch Enable
Pulse Width
OEAB, OEBA,
EAB, EBA
An, Bn
1.5V
1.5V
tPZL
tPLZ
1.5V
2.7V
0V
3.0V
VOL+0.3V
VOL
SV00116
Waveform 5. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
OEAB, OEBA,
EAB, EBA
An, Bn
1.5V
1.5V
tPZH
1.5V
tPHZ
2.7V
0V
VOH
VOH–0.3V
0V
SV00115
Waveform 4. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
TEST CIRCUIT AND WAVEFORM
VCC
PULSE
GENERATOR
VIN
RT
D.U.T.
VOUT
CL
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST SWITCH
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
6V
GND
6.0V
Open
90%
RL
GND
NEGATIVE
PULSE
RL
POSITIVE
PULSE
10%
VM
10%
tW
VM
10%
tTHL (tF)
tTLH (tR)
90%
VM
90%
VM
tW
VM = 1.5V
Input Pulse Definition
90%
AMP (V)
0V
tTLH (tR)
tTHL (tF)
AMP (V)
10%
0V
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
FAMILY
74LVT
INPUT PULSE REQUIREMENTS
Amplitude Rep. Rate tW tR tF
2.7V
v10MHz 500ns v2.5ns v2.5ns
SV00092
1998 Feb 19
7

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