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부품번호 | 74LVTH162374MEX 기능 |
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기능 | Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and 25 Series Resistors in the Outputs | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 8 페이지수
June 2000
Revised August 2001
74LVTH162374
Low Voltage 16-Bit D-Type Flip-Flop
with 3-STATE Outputs
and 25Ω Series Resistors in the Outputs
General Description
The LVTH162374 contains sixteen non-inverting D-type
flip-flops with 3-STATE outputs and is intended for bus ori-
ented applications. The device is byte controlled. A buff-
ered clock (CP) and Output Enable (OE) are common to
each byte and can be shorted together for full 16-bit opera-
tion.
The LVTH162374 is designed with equivalent 25Ω series
resistance in both the HIGH and LOW states of the output.
This design reduces line noise in applications such as
memory address drivers, clock drivers, and bus transceiv-
ers/transmitters.
The LVTH162374 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These flip-flops are designed for low-voltage (3.3V) VCC
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVTH162374 is fabricated
with an advanced BiCMOS technology to achieve high
speed operation similar to 5V ABT while maintaining a low
power dissipation.
Features
s Input and output interface capability to systems at
5V VCC
s Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
s Live insertion/extraction permitted
s Power Up/Power Down high impedance provides
glitch-free bus loading
s Outputs include equivalent series resistance of 25Ω to
make external termination resistors unnecessary and
reduce overshoot and undershoot
s Functionally compatible with the 74 series 16374
s Latch-up performance exceeds 500 mA
s ESD performance:
Human-body model > 2000V
Machine model > 200V
Charged-device model > 1000V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Ordering Code:
Order Number
Package
Number
Package Description
74LVTH162374GX
(Note 1)
BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
(Preliminary) [TAPE and REEL]
74LVTH162374MEA
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TUBES]
74LVTH162374MEX
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[TAPE and REEL]
74LVTH162374MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBES]
74LVTH162374MTX
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
Note 1: BGA package available in Tape and Reel only.
© 2001 Fairchild Semiconductor Corporation DS500355
www.fairchildsemi.com
Absolute Maximum Ratings(Note 2)
Symbol
Parameter
VCC Supply Voltage
VI DC Input Voltage
VO DC Output Voltage
IIK DC Input Diode Current
IOK DC Output Diode Current
IO DC Output Current
ICC
IGND
TSTG
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
Value
−0.5 to +4.6
−0.5 to +7.0
−0.5 to +7.0
−0.5 to +7.0
−50
−50
64
128
±64
±128
−65 to +150
Recommended Operating Conditions
Conditions
Output in 3-STATE
Output in HIGH or LOW State (Note 3)
VI < GND
VO < GND
VO > VCC Output at HIGH State
VO > VCC Output at LOW State
Units
V
V
V
mA
mA
mA
mA
mA
°C
Symbol
Parameter
Min
Max
Units
VCC Supply Voltage
2.7 3.6 V
VI Input Voltage
0 5.5 V
IOH HIGH Level Output Current
−12 mA
IOL LOW Level Output Current
12 mA
TA Free-Air Operating Temperature
−40 85 °C
∆t/∆V
Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V
0 10 ns/V
Note 2: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 3: IO Absolute Maximum Rating must be observed.
DC Electrical Characteristics
Symbol
Parameter
VIK Input Clamp Diode Voltage
VIH Input HIGH Voltage
VIL Input LOW Voltage
VOH Output HIGH Voltage
VOL Output LOW Voltage
II(HOLD)
Bushold Input Minimum Drive
VCC
(V)
2.7
2.7–3.6
2.7–3.6
2.7–3.6
3.0
2.7
3.0
3.0
II(OD)
II
IOFF
IPU/PD
IOZL
IOZH
IOZH+
ICCH
ICCL
ICCZ
Bushold Input Over-Drive
Current to Change State
Input Current
Control Pins
3.0
3.6
3.6
Data Pins 3.6
Power Off Leakage Current
Power Up/Down 3-STATE
Output Current
3-STATE Output Leakage Current
3-STATE Output Leakage Current
3-STATE Output Leakage Current
Power Supply Current
Power Supply Current
Power Supply Current
0
0–1.5V
3.6
3.6
3.6
3.6
3.6
3.6
T A = −40°C to +85°C
Min Max
−1.2
2.0
0.8
VCC − 0.2
2.0
0.2
0.8
75
−75
500
−500
10
±1
−5
1
±100
±100
−5
5
10
0.19
5
0.19
Units
Conditions
V II = −18 mA
V VO ≤ 0.1V or
V VO ≥ VCC − 0.1V
V IOH = −100 µA
IOH = −12 mA
V IOL = 100 µA
IOL = 12 mA
µA VI = 0.8V
VI = 2.0V
(Note 4)
µA
(Note 5)
VI = 5.5V
µA VI = 0V or VCC
VI = 0V
VI = VCC
µA 0V ≤ VI or VO ≤ 5.5V
µA VO = 0.5V to 3.0V
VI = GND or VCC
µA VO = 0.5V
µA VO = 3.0V
µA VCC < VO ≤ 5.5V
mA Outputs HIGH
mA Outputs LOW
mA Outputs Disabled
www.fairchildsemi.com
4
4페이지 Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
Package Number MS48A
7 www.fairchildsemi.com
7페이지 | |||
구 성 | 총 8 페이지수 | ||
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부품번호 | 상세설명 및 기능 | 제조사 |
74LVTH162374MEA | Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and 25 Series Resistors in the Outputs | Fairchild Semiconductor |
74LVTH162374MEX | Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and 25 Series Resistors in the Outputs | Fairchild Semiconductor |
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