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PDF 74LVTH32374G Data sheet ( Hoja de datos )
| Número de pieza | 74LVTH32374G | |
| Descripción | Low Voltage 32-Bit D-Type Flip-Flop with 3-STATE Outputs | |
| Fabricantes | Fairchild Semiconductor | |
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April 2001
Revised June 2002
74LVT32374 • 74LVTH32374
Low Voltage 32-Bit D-Type Flip-Flop
with 3-STATE Outputs
General Description
The LVT32374 and LVTH32374 contain thirty-two non-
inverting D-type flip-flops with 3-STATE outputs and are
intended for bus oriented applications. The device is byte
controlled. A buffered clock (CP) and Output Enable (OE)
are common to each byte and can be shorted together for
full 32-bit operation.
The LVTH32374 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These flip-flops are designed for low-voltage (3.3V) VCC
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVT32374 and LVTH32374
are fabricated with an advanced BiCMOS technology to
achieve high speed operation similar to 5V ABT while
maintaining a low power dissipation.
Features
s Input and output interface capability to systems at
5V VCC
s Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH32374)
s Also available without bushold feature (74LVT32374)
s Live insertion/extraction permitted
s Power Up/Down high impedance provides glitch-free
bus loading
s Outputs source/sink −32 mA/+64 mA
s ESD performance:
Human-body model > 2000V
Machine model > 200V
Charged-device model > 1000V
s Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Ordering Code:
Order Number
Package
Number
Package Description
74LVT32374G
(Note 1)(Note 2)
BGA96A 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
(Preliminary)
74LVTH32374G
(Note 1)(Note 2)
BGA96A 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Note 1: Ordering code “G” indicates Trays.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2002 Fairchild Semiconductor Corporation DS500452
www.fairchildsemi.com
1 page  
DC Electrical Characteristics (Continued)
Symbol
Parameter
ICCH
ICCL
ICCZ
ICCZ+
Power Supply Current
Power Supply Current
Power Supply Current
Power Supply Current
(VCC1 or VCC2)
(VCC1 or VCC2)
(VCC1 or VCC2)
(VCC1 or VCC2)
VCC
(V)
3.6
3.6
3.6
3.6
T A = −40°C to +85°C
Min Max
0.19
5
0.19
0.19
Units
mA
mA
mA
mA
∆ICC
Increase in Power Supply Current (VCC1 or VCC2)
(Note 8)
3.6
0.2 mA
Note 5: Applies to bushold version only (74LVTH32374).
Note 6: An external driver must sink at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than VCC or GND.
Conditions
Outputs HIGH
Outputs LOW
Outputs Disabled
VCC ≤ VO ≤ 5.5V,
Outputs Disabled
One Input at VCC − 0.6V
Other Inputs at VCC or GND
Dynamic Switching Characteristics (Note 9)
Symbol
Parameter
VCC TA = 25°C
Units
(V) Min Typ Max
VOLP
Quiet Output Maximum Dynamic VOL
3.3
0.8
V
VOLV
Quiet Output Minimum Dynamic VOL
3.3
−0.8
V
Note 9: Characterized in SSOP package. Guaranteed parameter, but not tested.
Note 10: Max number of outputs defined as (n). n−1 data inputs are driven 0V to 3V. Output under test held LOW.
Conditions
CL = 50 pF, RL = 500Ω
(Note 10)
(Note 10)
AC Electrical Characteristics
Symbol
Parameter
fMAX
tPHL
tPLH
tPZL
tPZH
tPLZ
tPHZ
tS
tH
tW
Maximum Clock Frequency
Propagation Delay
CP to On
Output Enable Time
Output Disable Time
Setup Time
Hold Time
Pulse Width
TA = −40°C to +85°C, CL = 50 pF, RL = 500Ω
VCC = 3.3V ± 0.3V
VCC = 2.7V
Min Max Min Max
160 160
1.9 4.3 1.9 4.6
1.6 4.5 1.6 5.2
1.3 4.4 1.3 5.0
1.0 4.5 1.0 5.4
1.5 4.6 1.5 4.8
2.0 5.0 2.0 5.4
1.8 2.0
0.8 0.1
3.0 3.0
Capacitance (Note 11)
Symbol
Parameter
Conditions
CIN Input Capacitance
VCC = OPEN, VI = 0V or VCC
COUT
Output Capacitance
VCC = 3.0V, VO = 0V or VCC
Note 11: Capacitance is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012.
Typical
4
8
Units
MHz
ns
ns
ns
ns
ns
ns
Units
pF
pF
5 www.fairchildsemi.com
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| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet 74LVTH32374G.PDF ] | |
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