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PDF 74LX1G07 Data sheet ( Hoja de datos )

Número de pieza 74LX1G07
Descripción SINGLE BUFFER/DRIVER (OPEN DRAIN)
Fabricantes STMicroelectronics　
Logotipo STMicroelectronics Logotipo



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No Preview Available ! 74LX1G07 Hoja de datos, Descripción, Manual

74LX1G07
SINGLE BUFFER/DRIVER (OPEN DRAIN)
s 5V TOLERANT INPUTS
s HIGH SPEED: tPD =4.2ns (MAX.) at VCC =
3.3V
s LOW POWER DISSIPATION:
ICC = 1µA(MAX.) at TA=25°C
s POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s POWER DOWN PROTECTION ON INPUT
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 1.65V to 5.5V
(1.2V Data Retention)
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LX1G07 is a low voltage CMOS SINGLE
BUFFER (OPEN DRAIN) fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
The internal circuit is composed of 2 stages
including buffer output, which provide high noise
immunity and stable output.
SOT23-5L
SOT323-5L
ORDER CODES
PACKAGE
SOT23-5L
SOT323-5L
T&R
74LX1G07STR
74LX1G07CTR
Power down protection is provided on input and 0
to 7V can be accepted on input with no regard to
the supply voltage. This device can be used to
interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2004
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74LX1G07 pdf
TEST CIRCUIT
74LX1G07
RT = ZOUT of pulse generator (typically 50Ω)
TEST CIRCUIT AND WAVEFORM SYMBOL VALUE
Symbol
CL
R1=RL
VIH
VM
tr = tf
1.65 to 1.95V
30pF
1000Ω
VCC
VCC/2
<2.0ns
VCC
2.3 to 2.7V
30pF/50pF
500Ω
VCC
VCC/2
<2.0ns
WAVEFORM: PROPAGATION DELAY (f=1MHz; 50% duty cycle)
2.7 to 5.5V
50pF
500Ω
VCC
VCC/2
<2.5ns
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