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74VCX16245 데이터시트 PDF




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부품번호 74VCX16245 기능
기능 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs
제조업체 Fairchild Semiconductor
로고 Fairchild Semiconductor 로고


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74VCX16245 데이터시트, 핀배열, 회로
www.DataSheet4U.com
October 1996
Revised June 2005
74VCX16245
Low Voltage 16-Bit Bidirectional Transceiver
with 3.6V Tolerant Inputs and Outputs
General Description
The VCX16245 contains sixteen non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus ori-
ented applications. The device is byte controlled. Each
byte has separate 3-STATE control inputs which can be
shorted together for full 16-bit operation. The T/R inputs
determine the direction of data flow through the device.
The OE inputs disable both the A and B ports by placing
them in a high impedance state.
The 74VCX16245 is designed for low voltage (1.2V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
The 74VCX16245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s 1.2V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD
2.5 ns max for 3.0V to 3.6V VCC
s Power-off high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s Static Drive (IOH/IOL)
r24 mA @ 3.0V VCC
s Uses patented noise/EMI reduction circuitry
s Latchup performance exceeds 300 mA
s ESD performance:
Human body model ! 2000V
Machine model !200V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number Package Number
Package Description
74VCX16245G
(Note 2)(Note 3)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74VCX16245MTD
(Note 3)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 2: Ordering code “G” indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2005 Fairchild Semiconductor Corporation DS012169
www.fairchildsemi.com




74VCX16245 pdf, 반도체, 판매, 대치품
DC Electrical Characteristics (Continued)
Symbol
Parameter
VOL LOW Level Output Voltage
II Input Leakage Current
IOZ 3-STATE Output Leakage
IOFF Power Off Leakage Current
ICC Quiescent Supply Current
'ICC
Increase in ICC per Input
Note 7: Outputs disabled or 3-STATE only.
Conditions
IOL 100 PA
IOL 12 mA
IOL 18 mA
IOL 24 mA
IOL 100 PA
IOL 12 mA
IOL 18 mA
IOL 100 PA
IOL 6 mA
IOL 100 PA
IOL 2 mA
IOL 100 PA
0V d VI d 3.6V
0V d VO d 3.6V
VI VIH or VIL
0V d (VI, VO) d 3.6V
VI VCC or GND
VCC d (VI, VO) d 3.6V (Note 7)
VIH VCC  0.6V
VCC
Min
Max
Units
(V)
2.7 - 3.6
0.2
2.7 0.4
3.0 0.4
3.0 0.55
2.3 - 2.7
0.2
2.3 0.4
V
2.3 0.6
1.65 - 2.3
0.2
1.65 0.3
1.4 - 1.6
0.2
1.4 0.35
1.2
1.2 - 3.6
VCC - 0.1
r5.0
PA
1.2 - 3.6
r10 PA
0
1.2 - 3.6
1.2 - 3.6
2.7 - 3.6
10 PA
20
PA
r20
750 PA
AC Electrical Characteristics (Note 8)
Symbol
Parameter
Conditions
VCC
TA 40qC to 85qC
Units
Figure
(V) Min Max
Number
tPHL Propagation Delay
tPLH
CL 30 pF, RL 500:
3.3 r 0.3
0.8
2.5
2.5 r 0.2
1.0
3.0
Figures
1, 2
1.8 r 0.15 1.0 6.0 ns
CL 15 pF, RL 2k:
1.5 r 0.1
1.2
1.0
1.5
12.0
30
Figures
5, 6
tPZL
tPZH
Output Enable Time
CL 30 pF, RL 500:
3.3 r 0.3
0.8
3.8
2.5 r 0.2
1.0
4.9
Figures
1, 3, 4
1.8 r 0.15 1.5 9.3 ns
CL 15 pF, RL 2k:
1.5 r 0.1
1.2
1.0
1.5
18.6
46.5
Figures
5, 7, 8
tPLZ
tPHZ
Output Disable Time
CL 30 pF, RL 500:
3.3 r 0.3
0.8
3.7
2.5 r 0.2
1.0
4.2
Figures
1, 3, 4
1.8 r 0.15 1.5 7.6 ns
CL 15 pF, RL 2k:
1.5 r 0.1
1.2
1.0
1.5
15.2
38
Figures
5, 7, 8
tOSHL
tOSLH
Output to Output
Skew (Note 9)
CL 30 pF, RL 500:
3.3 r 0.3
2.5 r 0.2
1.8 r 0.15
0.5
0.5
0.75
ns
CL 15 pF, RL 2k:
1.5 r 0.1
1.2
1.5
1.5
Note 8: For CL 50pF, add approximately 300ps to the AC maximum specification.
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
www.fairchildsemi.com
4

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74VCX16245 전자부품, 판매, 대치품
AC Loading and Waveforms (VCC 1.5V r 0.1V to 1.2V)
TEST
tPLH, tPHL
tPZL, tPLZ
SWITCH
Open
VCC x 2 at VCC 1.5 r 0.1V
FIGURE 5. AC Test Circuit
FIGURE 6. Waveform for Inverting and Non-Inverting Functions
FIGURE 7. 3-STATE Output High Enable and Disable Times for Low Voltage Logic
FIGURE 8. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic
Symbol
Vmi
Vmo
VX
VY
VCC
1.5V r 0.1V
VCC/2
VCC/2
VOL  0.1V
VOH  0.1V
7 www.fairchildsemi.com

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