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Número de pieza | 74VCXF162835 | |
Descripción | Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26 Series Resistors in Outputs | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de 74VCXF162835 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
No Preview Available ! October 1999
Revised November 2000
74VCXF162835
Low Voltage 18-Bit Universal Bus Driver with 3.6V
Tolerant Outputs and 26Ω Series Resistors in Outputs
General Description
Features
The VCXF162835 low voltage 18-bit universal bus driver s Compatible with PC133 DIMM module specifications
combines D-type latches and D-type flip-flops to allow data
flow in transparent, latched and clocked modes.
Data flow is controlled by output-enable (OE), latch-enable
(LE), and clock (CLK) inputs. The device operates in
Transparent Mode when LE is held HIGH. The device
s 1.65V–3.6V VCC specifications provided
s 3.6V tolerant outputs
s 26Ω series resistors in outputs
s tPD (CLK to On)
operates in clocked mode when LE is LOW and CLK is tog-
gled. Data transfers from the Inputs (In) to Outputs (On) on
a Positive Edge Transition of the Clock. When OE is LOW,
the output data is enabled. When OE is HIGH the output
port is in a high impedance state.
The VCXF162835 is designed with 26Ω series resistors in
the outputs. This design reduces noise in applications such
as memory address drivers, clock drivers, and bus trans-
3.2 ns max for 3.0V to 3.6V VCC
4.1 ns max for 2.3V to 2.7V VCC
7.4 ns max for 1.65V to 1.95V VCC
s Power-down high impedance outputs
s Static Drive (IOH/IOL)
±12 mA @ 3.0V VCC
±8 mA @ 2.3V VCC
ceivers/transmitters.
±3 mA @ 1.65V VCC
The 74VCXF162835 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O capability up to 3.6V.
s Latchup performance exceeds 300 mA
s ESD performance:
The 74VCXF162835 is fabricated with an advanced CMOS
Human body model > 2000V
technology to achieve high speed
ing low CMOS power dissipation.
operation
while
maintawinw-w.DataSheet4MU.caocmhine
model
>200V
Ordering Code:
Order Number
Package
Number
Package Description
74VCXF162835MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBES]
74VCXF162835MTX MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
(Note 1)
[TAPE and REEL]
Note 1: Use this Order Number to receive devices in Tape and Reel.
© 2000 Fairchild Semiconductor Corporation DS500259
www.fairchildsemi.com
1 page AC Electrical Characteristics (Note 11)
TA = −40°C to +85°C, CL = 30 pF, RL = 500Ω
Symbol
Parameter
VCC = 3.3V ± 0.3V
VCC = 2.5 ± 0.2V
VCC = 1.8 ± 0.15V
Units
Min Max Min Max Min Max
fMAX
tPHL, tPLH
Maximum Clock Frequency
Propagation Delay
Bus to Bus
250 200 100 MHz
0.6 3.1 0.8 4.0 1.5 7.2 ns
tPHL, tPLH Propagation Delay
Clock to Bus
1.0 3.2 1.5 4.1 2.0 7.4 ns
tPHL, tPLH Propagation Delay
LE to Bus
0.6 3.7 0.8 4.7 1.5 8.5 ns
tPZL, tPZH Output Enable Time
0.6 4.3 0.8 5.9 1.5 9.8 ns
tPLZ, tPHZ Output Disable Time
0.6 4.2 0.8 4.7 1.5 7.9 ns
tS Setup Time
1.5 1.5 2.5
ns
tH Hold Time
0.7 0.7 1.0
ns
tW Pulse Width
1.5 1.5 4.0
ns
tOSHL
tOSLH
Output to Output Skew
(Note 12)
0.5 0.5 0.75 ns
Note 11: For CL = 50pF, add approximately 300ps to the AC maximum specification.
Note 12: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
AC Electrical Characteristics Over Load (Note 13)
Symbol
Parameter
tPHL, tPLH Propagation Delay Bus to Bus
tPHL, tPLH Propagation Delay Clock to Bus
tPHL, tPLH Propagation Delay LE to Bus
tPZL, tPZH Output Enable Time
tPLZ, tPHZ Output Disable Time
tS Setup Time
tH Hold Time
Note 13: Characterized only.
TA = −0°C to +85°C, RL = 500Ω VCC = 3.3V ± 03V
CL = 50 pF
Min Max
1.0 3.4
1.4 3.5
1.0 4.0
1.0 4.6
1.0 4.5
1.0
0.6
Units
ns
ns
ns
ns
ns
ns
ns
Dynamic Switching Characteristics
Symbol
Parameter
VOLP
Quiet Output Dynamic Peak VOL
VOLV
Quiet Output Dynamic Valley VOL
VOHV
Quiet Output Dynamic Valley VOH
Conditions
CL = 30 pF, VIH = VCC, VIL = 0V
CL = 30 pF, VIH = VCC, VIL = 0V
CL = 30 pF, VIH = VCC, VIL = 0V
VCC
TA=+25°C
Units
(V) Typical
1.8 0.25
2.5 0.40
V
3.3 0.55
1.8 −0.25
2.5 −0.40
V
3.3 −0.55
1.8 1.35
2.5 1.80
V
3.3 2.30
5 www.fairchildsemi.com
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet 74VCXF162835.PDF ] |
Número de pieza | Descripción | Fabricantes |
74VCXF162835 | Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26 Series Resistors in Outputs | Fairchild Semiconductor |
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