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부품번호 | 74VCXH16244 기능 |
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기능 | Low Voltage 16-Bit Buffer/Line Driver with Bushold | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 7 페이지수
December 1999
Revised March 2000
74VCXH16240
Low Voltage 16-Bit Inverting Buffer/Line Driver
with Bushold
General Description
The VCXH16240 contains sixteen inverting buffers with 3-
STATE outputs to be employed as a memory and address
driver, clock driver, or bus oriented transmitter/receiver.
The device is nibble (4-bit) controlled. Each nibble has sep-
arate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The VCXH16240 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating inputs at a valid logic level.
The 74VCXH16240 is designed for low voltage (1.65V to
3.6V) VCC applications with output capability up to 3.6V.
The 74VCXH16240 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s 1.65V–3.6V VCC supply operation
s 3.6V tolerant control inputs and outputs
s Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
s tPD
2.5 ns max for 3.0V to 3.6V VCC
3.0 ns max for 2.3V to 2.7V VCC
6.0 ns max for 1.65V to 1.95V VCC
s Static Drive (IOH/IOL)
±24 mA @ 3.0V VCC
±18 mA @ 2.3V VCC
±6 mA @ 1.65V VCC
s Uses patented noise/EMI reduction circuitry
s Latch-up performance exceeds 300 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Ordering Code:
Order Number
74VCXH16240MTD
Package
Number
MTD48
Package Descriptions
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
OEn
I0–I15
O0–O15
Description
Output Enable Input (Active LOW)
Bushold Inputs
Outputs
© 2000 Fairchild Semiconductor Corporation DS500232
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DC Electrical Characteristics (2.3V ≤ VCC ≤ 2.7V)
Symbol
Parameter
Conditions
VIH
VIL
VOH
VOL
II
II(HOLD)
II(OD)
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
Input Leakage Current
Bushold Input Minimum
Drive Hold Current
Bushold Input Over-Drive
Current to Change State
Control Pins
Data Pins
IOH = −100 µA
IOH = −6 mA
IOH = −12 mA
IOH = −18 mA
IOL = 100 µA
IOL = 12 mA
IOL = 18 mA
0 ≤ VI ≤ 3.6V
VI = VCC or GND
VIN = 0.7V
VIN = 1.6V
(Note 7)
(Note 8)
IOZ 3-STATE Output Leakage
0 ≤ VO ≤ 3.6V
VI = VIH or VIL
IOFF Power-OFF Leakage Current
0 ≤ (VO) ≤ 3.6V
ICC Quiescent Supply Current
VI = VCC or GND
VCC ≤ (VO) ≤ 3.6V (Note 9)
Note 7: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 8: An external driver must source at least the specified current to switch from HIGH-to-LOW.
Note 9: Outputs disabled or 3-STATE only.
VCC
(V)
2.3 − 2.7
2.3 − 2.7
2.3 − 2.7
2.3
2.3
2.3
2.3 − 2.7
2.3
2.3
2.3 − 2.7
2.3 − 2.7
2.3
2.3
2.7
2.7
Min
1.6
VCC − 0.2
2.0
1.8
1.7
45
−45
300
−300
2.3 − 2.7
0
2.3 − 2.7
2.3 − 2.7
Max
0.7
0.2
0.4
0.6
±5.0
±5.0
±10
10
20
±20
DC Electrical Characteristics (1.65V ≤ VCC < 2.3V)
Symbol
Parameter
Conditions
VIH
VIL
VOH
VOL
II
II(HOLD)
II(OD)
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
Input Leakage Current
Bushold Input Minimum
Drive Hold Current
Bushold Input Over-Drive
Current to Change State
Control Pins
Data Pins
IOH = −100 µA
IOH = −6 mA
IOL = 100 µA
IOL = 6 mA
0 ≤ VI ≤ 3.6V
VI = VCC or GND
VIN = 0.57V
VIN = 1.07V
(Note 10)
(Note 11)
IOZ 3-STATE Output Leakage
0 ≤ VO ≤ 3.6V
VI = VIH or VIL
IOFF Power-OFF Leakage Current
0 ≤ (VO) ≤ 3.6V
ICC Quiescent Supply Current
VI = VCC or GND
VCC ≤ (VO) ≤ 3.6V (Note 12)
Note 10: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 11: An external driver must source at least the specified current to switch from HIGH-to-LOW.
Note 12: Outputs disabled or 3-STATE only.
VCC
(V)
1.65 - 2.3
1.65 - 2.3
1.65 - 2.3
1.65
1.65 - 2.3
1.65
1.65 - 2.3
1.65 - 2.3
1.65
1.65
1.95
1.95
Min Max
0.65 × VCC
VCC − 0.2
1.25
0.35 × VCC
0.2
0.3
±5.0
±5.0
25
−25
200
−200
1.65 - 2.3
±10
0
1.65 - 2.3
1.65 − 2.3
10
20
±20
Units
V
V
V
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
µA
Units
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
µA
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4
4페이지 Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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부품번호 | 상세설명 및 기능 | 제조사 |
74VCXH16240 | Low Voltage 16-Bit Inverting Buffer/Line Driver with Bushold | Fairchild Semiconductor |
74VCXH16240 | Low-Voltage 1.8/2.5/3.3V 16-Bit Buffer | ON Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |